News & Analysis

Actel discusses low power and power management at ESC Silicon Valley

Clive Maxfield

4/14/2008 8:11 PM EDT

Speakers from Actel will address the growing need for power efficiency at the chip and system levels at Embedded Systems Conference Silicon Valley, being held April 14 to 18 in San Jose, California at the McEnery Convention Center.

Topics will include methods to minimize power consumption for portable applications; embedded design using an FPGA-optimized ARM Cortex-M1 processor; and design techniques for power-efficient motor control.

In their private meeting center, Booth #106, Actel will end the programmable logic industry's low-power leadership debate, comparing the company's 5 microWatt IGLOO FPGAs to competitive CPLD and FPGA offerings.

Design techniques for power-efficient motor control
Tuesday April 15 12:30 – 2:00 pm; Session ESC-245

Embedded Design with FPGAs and the ARM Cortex-M1
Tuesday April 15 2:30 – 4:00 pm; Session SS-Actel1

FPGAs and ARM – minimizing power for portable applications
Wednesday April 16 10:30 am – 12:00 pm; Session SS-Actel2



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