Leon-3 multiprocessor wins defense design-in, says Gaisler

LONDON — Gaisler Research AB has licensed Eonic BV (Delft, The Netherlands) to use a Leon-3 processor core multiple times in a system-on-chip design. Under the deal the Leon-3 core and the GRLIB IP library will be used in the design of a multichannel digital recorder and replay system for signals intelligence and communications.

The Leon-3 is based on the Sparc instruction set architecture and although originally developed as a uniprocessor has multiprocessor capabilities according to Gaisler.

Gaisler Research (Gothenburg, Sweden), founded by Jiri Gaisler in 2001, specializes in digital hardware design for commercial and aerospace applications. It was while working for the European Space Agency (ESA) that Gaisler developed Leon, a Sparc-compliant 32-bit processor, for which the design source code was made freely available. Gaisler now offers the Leon-2 and Leon-3 cores, all Sparc v8 compliant. With its ESA background Gaisler Research has become a provider of SoC technology for aerospace, military and demanding commercial applications.

Another European company that offers processor cores for free Simply RISC has developed a 64-bit core based on a single processor the Sun Microsystems T1 processor and which therefore also supports multiprocessing.

"We're delighted that Eonic, after evaluation against competing architectures' multiprocessor solutions, selected the Leon-3 and GRLIB for its next-generation SoC design," said Per Danielsson, president and chief executive officer of Gaisler Research, in a statement. "With the LEON3 multi-processor technology, the Sigint 5000 will benefit from increased performance and lower development costs."

Eonic is a developer of reconfigurable systems with a special emphasis on serving defense and security applications.