News & Analysis
Mature Design Tools Move MEMS into the Mainstream
Jack Shandle
9/1/2005 12:00 AM EDT
Because MEMS structures can deliver new features and capabilities in high-volume consumer products, electronics engineers are increasingly being confronted with a new opportunity and challenge: Designing their own MEMS.
Prominent examples of products already in use are tri-axis accelerometers in notebook PCs that lock hard disk drives when the PC is dropped. In the near future, cell phones will integrate chemical-sensor MEMS to measure alcohol levels in a user's breath. MEMS gyroscopes will soon be used for image stabilization in digital still cameras to compensate dynamically for the movements of unsteady hands.
Component footprint is always a critical issue in notebook PC and handheld product design. From the design team's perspective, the ability to control the size of the MEMS or even integrate it into ASICs offers appealing possibilities to save space, power, and cost compared to a hybrid solution.
The challenge is that MEMS design is a multidisciplinary exercise. In addition to designing circuits, design teams must tackle mechanical, fluidic, and optical design problems. The 3D nature of MEMS devices involves geometries composed of arcs, curves, circles, and other shapes, all of which are unknown territory not just to designers but to most of the tools they use as well.
Learning the intricacies of MEMS design has, in the past, presented a major obstacle to design teams. That is quickly changingbut there are still a few pitfalls that must be avoided.
As a result, there is no standard, top-down methodology that MEMS design tool companies can leverage for their products, says Mary Ann Maher, president of SoftMEMS, a MEMS CAD vendor headquartered in Los Gatos, CA.
MEMS CAD companies are addressing this problem by providing tools for both bottom-up and top-down design. In the meantime, initiatives in library development and standardization across the industry are being developed.
A generic example of the top-down, bottom-up design flow for MEMS from a system-level perspective is shown in Figure 1. The interdependence of MEMS design is shown in the loop at the bottom that includes the following four blocks: model behavior, layout, 3D physics model, and model extraction. Design flow will be discussed in more detail later.
The most optimistic development from the IC designer's perspective is the tools themselves. They have begun to automate the finite element analysis calculations typical of MEMS design. In some cases, MEMS design tools work very well within the design environment of major EDA vendors such as Mentor Graphics and Cadence.
IntelliSense combines bottom-up (process-driven) and top-down (schematic-driven) design methodologies into its IntelliSuite design environment. In this environment, the bottom-up approach is not at all like mechanical CAD in which the designer has to learn how to use 3D tools such as AutoCAD, says Akkaraju.
The design flow typically begins with the top-down, or schematic-driven, design loop. Much like schematic-capture IC tools such as Spice or Spectre, a tool called Synple provides access to a library of schematics of MEMS elements for a specific structure. A cantilever beam such as might be used in an accelerometer, for example, would include elements such as anchors, plates, and comb drives.
The designer drags and drops the elements onto a canvas along with typical electrical design elements such as tree models, gates, and flip flops. From this schematic, a model can be derived. The mask set can be created from the schematic-driven model. But the schematic-driven model really only provides about 90% of the information required for the accurate model needed for fabricating a successful structure. The remaining information is derived from the process-driven (bottom-up) model.
Using the schematic-driven model as a starting point, IntelliSuite applies critical process-dependent information from the foundry. The designer adds electrical and mechanical loads. The next step is to perform the calculations that create a 3D mesh of the structure. This step can be entirely automated or it can be partially automatic with manual refinements. In this way, the generic model is iteratively customized into a structure specific to the application.
This methodology has the advantage of allowing design teams to explore as many "what if" scenarios that their schedule can accommodate.
The reason that the bottom-up and top-down approaches must "meet in the middle" is that the models from a standard 3D CAD program don't take into account the intricacies of semiconductor processing.
Perhaps the most important distinction is that the edge processes are not like those that 3D modeling software would assume them to be. In addition, the IC fabrication process involves depositing layers and the layers tend to interact with each other. These aspects of MEMS design are handled by the bottom-up methodology.
From the MEMS perspective, foundries come in two primary flavors: surface processing and bulk processing. Surface processes are typically very similar to standards CMOS processes in which films are deposited in layers. They are therefore more amenable to MEMS devices that have circuits integrated on the same die. The process Analog Devices uses to fabricate its accelerometers is a good example of a surface process.
Bulk processes, on the other hand, are appropriate for larger MEMS devices where the micromachining using deep etching techniques is required. This type of MEMS typically results in a hybrid system in which a MEMS is bonded to an ASIC, says Amish Desai, MEMS Product Development Manager at Tanner Research, Pasadena, CA.
Once found, the foundry will provide the characteristics and design rules needed to create the mask set.
Most rules involve spacing, overlap, and insulations such as:
- Insulation must be used under a Permalloy layer when it is overlapping a specific copper layer
- Wires must have a 4µm spacing between them.
Tanner Research's L-Edit includes a high performance, all-angle, hierarchical design rule checker that uses a Windows interface to display both the design module and the rules in separate windows as shown in Figure 2. In addition to overlap, spacing, and insulation, rules can include parameters such as width, surround, enclosures, extensions, area, and density.
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Rule setup is user-configurable for any process technology. Hierarchical error output displays errors at the level of the hierarchy where they occur. An error navigator opens the cell and zooms automatically to the location of the error.
While the mindset of the typical IC designer is to pack as many transistors on a chip as possible, in the MEMS world conservatismnot designing right up to the design rulesis critical, says Desai. Unlike transistors, which maintain the same electrical performance characteristics when scaled down, the physical characteristics of MEMS devices are critically dependent on size.
The distance between a moving cantilever beam in a pressure sensor and a stationary structural component has an important effect on damping and other fluid mechanical characteristics. It is close to the mean free path of molecules that make up the air in between. Similarly, shrinking the physical size of a component has effects on its strength.
As a result, design teams usually build a set of internal rules specific to the applications they work on and they combine them with the design rules from the foundry. In some instances, design rules can be used for one of the few standardized MEMS processes, called MUMPS for Multi-User MEMS Process. But the design team must first assure itself that MUMPS meets the application's requirements.
This creates another potential pitfall for IC designers because GDSII and the raster images generated from them limit the resolution of curves. For example, a MEMS device may include a 1000 µm diameter circle as part of its design.
Until recently GDSII had an arbitrary 200-vertex limit, which is quite sufficient for IC masks. But when a 1000 µm diameter circle is polygonized using 200 vertices, the circle becomes a 200-sided polygon of about 15µm sides. Manufacturing a device at this resolution would undoubtedly result in serious yield problems.
A polygon of 2048 sides is a much better approximation of a circle and recently GDSII expanded the number of vertices it supports to the theoretical limit of 2048. This helps. But MEMS designs can have curves that are defined as parts of large circles and these must be compensated for with manual intervention by a layout designer, or, by MEMS layout tools such as Tanner Research's L-Edit.
Tanner's Research's approach to MEMS design differs significantly from IntelliSense's because L-Edit is a layout tool and does not do any 3D modeling. It can be integrated with a 3D modeling tool from SoftMEMS called MEMSPro. L-Edit has a Windows interface and offers a good deal of similarity to layout tools used by IC designers, says Senior Product Manager Nicholas Williams.
Accelerometers, for example, all have a series of cantilevered beams anchored at one end with a moving mass at the other. Changes in either capacitance or resistance can be measured when the beams bend and both produce a direct relationship between acceleration and capacitance or resistance.
Piezoresistive accelerometers are created by doping resistors into the beams and measuring changing resistance with a Wheatstone bridge. Capacitors can be added by using the moving plate as one electrode and the stationary plate as the other.
MEMS pressure sensors have been manufactured for more than 20 years and require only the ability to fabricate a flat membrane. The next big market for these devices will be automotivelegislation in the U.S. has mandated monitoring tire pressure and the preferred system would be MEMS sensors and RF technology to transmit the information to the car's computer.
Other applications in which footprint, power consumption, and cost argue for MEMS devices include chemical sensing built into cell phonesthat is, alcohol and breath-freshness sensors; image stabilization in digital cameras and other consumer video devices; and tri-axis accelerometers and gyroscopes for hard-disk drive lockdown.
With the newest generation of design tools from companies such as IntelliSense, Tanner Research, SoftMEMS, and Coventor of Cary, NC, those applications are no longer beyond the reach of typical IC design teams.
Contributing writer Jack Shandle is a former chief editor of both Electronic Design magazine and ChipCenter.com. He holds a BSEE degree and has written hundreds of articles on all aspects of the electronics OEM industry. Jack is president of e-ContentWorks, a consultancy that creates high-value web and print content for publishers, eOEM corporations, and industry associations. His email address is jshandle@e-contentWorks.com.


