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Survey reveals EUV to be used for making chips in 2014

Nicolas Mokhoff

5/24/2010 10:58 PM EDT

NEW YORK — A survey of more than 130 attendees at the Sematech Litho Forum recently held here resulted in few surprises, reflecting the general trend in continuing lithography's current course as the best way to manufacture next-generation chips.

Executives and technology leaders made their plans and preferences known on lithographic approaches.

As at previous such forums, 193 nm immersion double patterning continues to be the suitable lithographic technology for volume manufacturing in 2012.

EUV would be capable of being placed into manufacturing in 2014, with extendibility into manufacturing in 2016.

The top challenges to manufacturing next-generation devices using immersion double patterning were said to be cost of ownership, overlay capability, and extendibility to the next-generation device.

As for EUV technology challeneges, mask defects, source power, exposure tool throughput, and cost of ownership were rated at the topof the list.

Finally, 193 nm and EUV were chosen as the technologies that would be considered for manufacturing at the 32 nm node or beyond.

"The fundamental enabler of the industry is improving the cost per function," said Dan Armbrust, president and CEO of Sematech. "For the industry to evolve, business models need to take into account collaborations to control costs and extend current technologies while building the infrastructure for future solutions."

Keynote speaker Gary Patton, Vice President, Semiconductor Research & Development Center at IBM, focused on the need for industry collaboration and innovation to continue the semiconducto technology roadmap forward and pointed to Sematech's collaboration on EUV infrastructure as a good example of the type of collaborative innovation to make EUV happen.

Sematech is the international consortium of leading semiconductor manufacturers.

"This year, more than any other, the EUV community must work collaboratively to address capital cost challenges to set global industry direction, accelerate technology solutions in infrastructure, and bring innovative products to market," said John Warlaumont, vice president of advanced technologies for Sematech.

Guest speaker Congressman Paul D. Tonko (NY-Albany) urged the semiconductor executives and technologists companies “must do basic research that will translate into jobs. Only by investing in research today will we ensure the U.S. prosperity."

He said that the course for this must start in community colleges, such as the one in his district, the Hudson Valley Community College. "This is a good example to prepare the work force in hi-tech. Degrees from community colleges will have higher demand for the hi-tech work force than four-year colleges", said Tonko.

He called for teachers and industry trainers to teach with a passion for science, technology and math. "Sputnik was an inspiration in the last century. You as experts need to explain litho terms to Congress "in order for members of understand that scaling chips is a profitable endeavor," said Tonko.

"We face the same conditions as when the space age was born; however the semiconductor fabrication complexities deny the government to act accordingly," said Tonko.

Tonko wants to generate jobs "here at home". "As new technologies are associated for making 20nm devices, the question looms do we want to develop [these technologies] here in U.S. or do we sit on the sidelines for other countries to pass us by?" aksed Tonko.

Tonko also wants to embark on immigration reform policy: "we need to develop an opportunity to have foreign graduates to be able to receive degrees and nationalization papers at the same time", citing that 50 percent of Silicon Valley engineers are foreign born". "We need to act on this," said Tonko.

In their talks, Jim Clifford, senior vice president and general manager of operations at Qualcomm, and Jack Sun, vice president of research and development at TSMC, focused on economic challenges in advanced lithography.

Clifford said the Internet is making possible for expanding market opportunities for chips: "The Internet of everything is going to drive chips production. Today there are two convergences: wireless and computing and consumer electronics; and Internet anytime, anywhere for anyone."

"Qualcomm shipping one billion chips a year, mostly because we consolidate three chips in one," said Clifford. “It can’t all be about cost anymore, value creation is more important."

Janice Golda, Intel's Director, Lithography Capital Equipment Development, said that for its part, Intel has embarked on "co-optimization of design, process and litho."

"We used to wait for the next generation silicon to be more cost-effective and squeeze out the most of current silicon technology, now we need to make cost efficiency trade off with the needed performance."

Jack Sun at TSMC agreed: "It is no longer a performance-driven industry. We need parallel processing architectures; affordable density scaling with lithography and a lot of collaboration mong many diverse semiconductor industry players."

Sun’s comments fell in line with this year’s forum’s focus on turning "innovation into value," the conscious development of lithography solutions that incorporate economic feasibility to provide true value and allow the industry to grow.





Ratgebber

5/25/2010 9:31 PM EDT

Guest speaker Congressman Paul D. Tonko (NY-Albany) has dabbled with all possible buzz words in a combinatorial mosaic but is he coherent?
First he urges companies to do basic research -- but research is done in the universities. Than he dismisses this very same institutions (4 year colleges) as providers of 'bad preparation' of the work force. Finally he top it off with the statement that 50% of the Silicon Valley Engineers are foreign born which is a statement about US education.
Makes very little sense to me!

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resistion

5/29/2010 6:47 AM EDT

I saw the broken-out results at fabtech.org. 60% favored DP in 2012 for critical layers, mainly 22 nm. For 2014-2015 (16 nm), DP and EUV each got over a third; they were very close but EUV got a little more support. For 2016-2018 (11 nm), DP dropped to less than 20%, while EUV was divided about 2:1 between high NA and original, and "other" increased to over 10%. EUV momentum is definitely slowing down.

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