IBM 'fab club' aligns 28-nm process, jabs rival

SAN JOSE, Calif. -- Four companies in IBM Corp.’s ''fab club’’--IBM, Samsung, GlobalFoundries and STMicroelectronics--said that they are in collaboration to ''synchronize’’ the production of chips, based on its previously-announced, 28-nm low-power process.

The group will begin shipping 28-nm wafers starting by the later part of 2010. IBM’s group has also come out of its shell and launched a subtle verbal attack on the rival foundry camp, reportedly Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC).

The group did not mention TSMC by name, but the Taiwan foundry giant has been critical of the high-k technology implemented by IBM’s group. IBM’s 28-nm process is based on a high-k/metal-gate scheme, built around a gate-first technology.

In contrast, TSMC uses the rival gate-last technology in its high-k technology. Members of IBM’s fab club defended its technology, saying that it’s superior over competitive offerings.

In any case, leading-edge foundries are rushing to bring their latest and greatest processes to the market--and for good reason: The IC market is hot and the outsourcing specialists hope to capitalize on the up cycle. Many of the foundries have also boosted their capital spending and launched marketing campaigns to gain mindshare.

At present, leading-edge foundries are shipping their 45-/40-nm processes, which do not include high-k and metal gates. All are gearing up to ramp their 32- and/or 28-nm processes, which brings the foundries into the high-k era.

In the foundry space, IBM’s fab club, TSMC and UMC have separately announced 28-nm processes based on high-k. IBM’s group and TSMC claim to be the leaders in the segment.

To some, IBM’s group is slightly ahead in the foundry space. IBM's ''fab club,'' which includes IBM, Samsung and GlobalFoundries, first announced its 32-nm process in 2008. Last year, the group announced the 28-nm process. The club jointly developed the process and high-k technology.

Recently, South Korea's Samsung Electronics Co. Ltd. said its foundry business has qualified a 32-nm low-power process with high-k/metal-gate technology. The company lays claim to being the first foundry to ''qualify'' a high-k/metal-gate technology. Samsung said the bulk process has completed reliability testing at its 300-mm logic fabrication line in Giheung, South Korea and, is now ready for production of customer designs.

GlobalFoundries will not ship a 32-nm bulk technology with high-k. Instead, it will ramp a 32-nm silicon-on-insulator (SOI) technology with high-k for a customer, namely Advanced Micro Devices Inc. Not long ago, AMD spun-off its manufacturing unit into a new company called GlobalFoundries.

Meanwhile, at 28-nm, IBM, Samsung, GlobalFoundries and ST are collaborating to synchronize their fabs to roll out the previously-announced 28-nm low-power process. The synchronization process helps ensure that customers’ chip designs can be produced at multiple sources in three different continents with no redesign required, according to the group.

The group is working with ST to develop and standardize the 28-nm process technology. The low-power, 28-nm process technology is designed for the next-generation of smart mobile devices, enabling low standby power and longer battery life.

In the later part of 2010, IBM will be the first company to ship the 28-nm process, said Gary Patton, vice president for IBM's Semiconductor Research and Development Center, during a conference call.

Following IBM, other members of the group will ship wafers starting in the second half of 2010 and first part of 2011, he said. “IBM has extensive experience synchronizing multiple fabs, where we match rigorous manufacturing specifications to critical design parameters,” he added. “ The result is that our advanced technology can be implemented in many fabs around the world and produce the same results, providing clients with multiple suppliers for their product designs.”

Also during the call, IBM’s club defended its high-k technology, which has taken shots in the media, namely from TSMC. This has created ''FUD (fear, uncertainty and doubt) about gate-first,’’ said Suresh Venkatesan, vice president at GlobalFoundries.

Competitors, he said, claim that gate-first is hard to manufacturer and has ''pinning issues'' in threshold voltage (Vt).

On the contrary, he said that gate-first has several advantages over rival gate-last. First, it enables 10-to-20 percent smaller die sizes, he said. Second, it is easier to manufacturer, and, contrary to popular belief, there are no ''Vt pinning issues,’’ he said.