NetLogic debuts chip set with RMI processor

SAN JOSE, Calif. — NetLogic Microsystems is rolling out its first product since acquiring network processor vendor RMI Corp. in June 2009. The NLX321103A is a three chip set that aims to handle a broad range of packet-processing functions at speeds up to 40 Gbits/second.

The chip set is aimed to help the company expand its customer base as it competes with a new 32-core processor from Cavium Networks and the first 64-bit Power-based chips from Freescale Semiconductor.

"This is actually a big year for new networking processors--there's a lot hitting at once," said Joe Byrne, a senior analyst for market watcher the Linley Group (Mountain View, Calif.). "This is about how NetLogic gets into high packet touch apps like unified threat management systems, expanding beyond low-level switching and routing," Byrne said.

The NLX321103A includes RMI's eight-core, quad-threaded XLR processor linked over Interlaken and Xaui interconnects with two existing NetLogic parts. The NL11k handles Layer 2-4 flow classification and the NETL7 inspects Layer 7 information based on Perl Compatible Regular Expression signatures. The XLR and NL11k are made in a TSMC 40nm process.

NetLogic claims the three chips can put all packet processing functions on a single board, handling a wide variety of security, quality-of-service and forwarding functions. The chips, which will sample this fall, are the first to support a unified software environment across NetLogic and RMI components.

"We are enabling a lot of special features not everyone has had access to," said Ron Jankov, chief executive of NetLogic. "We've probably doubled the resources in our software organizations," since the RMI acquisition, he said.

The chips support Internet Protocol version 6.0, which expands the address space of today's IPv4 expected to run out of capacity in 2011.

"Last year IPv6 was for exception traffic, but now OEMs want silicon that can process IPv6 as the main traffic," Jankov said. "This is a dramatic design change because the IPv6 header is 500 bits versus 100 bits for IPv4," he said.

NetLogic has said it is designing integrated silicon for mainstream markets using RMI designs, but would not provide details on the parts. It is also at work on next-generation 28nm devices.

"I think we can beat Freescale to market with our 28nm chips before they get their first 64-bit Power versions to market," said Jankov.

The company has secured at least one public design win using a mixture of NetLogic and RMI parts. “We are excited to be offering our latest generation ATCA products using NetLogic's multi-core, multi-threaded processors and knowledge-based processors,” said Mike Coward, chief technology officer at Continuous Computing.