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UofT Eng

9/4/2010 8:47 AM EDT

The variability doesn't come from the process only but also EDA tools because ...

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goafrit

9/4/2010 8:28 AM EDT

I have noticed that what happens in the foundry influence a lot. I would have ...

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Startup offers 'variability' modeling service

Peter Clarke

9/2/2010 7:06 AM EDT

LONDON – Gold Standard Simulations Ltd., a spin-off from the University of Glasgow, has been set up to help chip designers model how circuits made from variable and unreliable nanoscale transistors will perform.

Manufacturing-variability and atomic-scale variability are known to be issues as the minimum dimensions of circuits head below 20-nm and creating design rules for the worst case is no longer appropriate. Trying to avoid variability means that the number of design rules explodes exponentially and guard-bands effectively put a stop to miniaturization. However, variations in structure can result in variable and unreliable performance – affecting circuit performance and yield.

The consequence is that designers need to take statistical variability into account when designing circuits and supporting this is the charter Gold Standard Simulations (GSS) has set for itself.

The company was created by Professor Asen Asenov (shown), who holds the James Watt Chair in Electrical Engineering at the College of Science and Technology at Glasgow University. Professor Asenov is serving the company as CEO.

"GSS is offering a world-leading simulation service to chip developers and manufacturers. The University of Glasgow is at the forefront of this technology," said Professor Asenov, in a statement.

The company's executives are three PhD graduates: Campbell Millar, Gareth Roy and Dave Reid. Reid is an expert in software development methods and statistical circuit simulation and is the primary developer of the GSS RandomSPICE software and provides compact modeling services within the company. The company will also offer courses in statistical variability on how to design variability-resistant and reliable devices and circuits.

The company, which is based at the university, is subcontracted to provide simulation services for the MODERN (MOdeling and DEsign of Reliable, process variation-aware Nanoelectronic devices, circuits and systems) project – a €26 million (about $33 million) European collaborative research project looking at how to design computer chips.

Professor Asenov is leading the University of Glasgow’s involvement in the project which is worth £1.5 million (about $2.3 million) to the university and comprises 28 European partners.

Intellectual property partner Carina Healy of law firm Dundas & Wilson advised on the establishment of GSS, the structure of the spin-out; the corporate documentation; the intellectual property licensing and research arrangements; and the funding agreements with partner Scottish Enterprise.No details were given of how much funding GSS is receiving.

She said: "Setting up Gold Standard Simulations Ltd. is an important step in commercializing the world-leading expertise at Glasgow University in device modeling. It shows that there is funding available for good spin out company opportunities even in the current economic environment."

Related links and articles:

www.goldstandardsimulations.com


www.scottish-enterprise.com

www.eniac-modern.org

www.gla.ac.uk

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iniewski

9/3/2010 11:09 AM EDT

For this service to make sense you must be tied very closely to the foundry. There has been number of companies like PDF Solutions that have been offering yield enhancement service for years. What is different about GSS? Kris

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goafrit

9/4/2010 8:28 AM EDT

I have noticed that what happens in the foundry influence a lot. I would have liked this to come from the foundry consortium. There are many things that go wrong when a chip enters a foundry that modeling could just be a waste of time.

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UofT Eng

9/4/2010 8:47 AM EDT

The variability doesn't come from the process only but also EDA tools because some layout effects are too complicated to model. Moreover, the variability requires wide range of design margin which seriously hurt the production cost.

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