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jimcondon
One of the cool things about the Sandy Bridge is that since the graphics are on ...
I.S.YU
@resistion: Yes, the concepts are same but used GPUs are different. TunnelCreek ...
Inside Intel's Sandy Bridge architecture
Rick Merritt
9/13/2010 9:17 PM EDT
SAN JOSE, Calif. – Intel has officially entered the race to heterogeneous computer processors, sketching out the first members of its Sandy Bridge family that will ship before April. The 32nm chips will come in versions with two or four dual-threaded x86 cores and one graphics core on a shared ring interconnect.
The first Sandy Bridge parts are aimed at notebooks, desktops and single-socket servers. Versions with more cores aimed at multi-socket servers will follow later in the year or early in 2012.
The Intel CPUs will compete head on with parts from archrival Advanced Micro Devices such as Ontario, a 40nm CPU using two of AMD's new Bobcat cores and a Microsoft DirectX11-class graphics core. Ontario is sampling now, and AMD has similar desktop and server chips in the works for the second half of 2011.
AMD will have an edge in graphics. Engineers at the Intel Developer Forum here said their new graphics block will not support the DirectX 11 API. However, Intel outlined a host of enhancements in its processor that will help it compete in other areas.
"There are no exclusive DX11 games out today, and DX11 is around the corner for Intel based products," said Tom Piazza, an Intel fellow who led the graphics core design.
The rivals are not yet releasing the most significant details of the chips such as performance, data rates and cache sizes. However both companies' desktop chips are likely to be held to two DDR3 external memory channels, a limit set by PC makers, said Opher Kahn, a senior principal engineer on Sandy Bridge.
Intel's Opher Kahn worked on the Sandy Bridge ring interconnect
Among other external interconnects, Sandy Bridge supports PCI Express Gen2 and DisplayPort.
Engineers packed back-to-back afternoon sessions at IDF describing some of the low level details of Sandy Bridge. Chief among them is the use of a ring interconnect that could scale to link as many as 20 cores on a die, said Kahn.
Intel re-used much of the electrical design of previous rings on Intel's previous Westmere and Larrabee processors. However, they re-worked much of the higher-layer coherency protocols for Sandy Bridge.
The interconnect is made up of at least four rings, a 32-byte data link and separate rings for requests, acknowledgements and snooping. The rings are overlaid on the design of the so-called last-level cache.
The cache is broken up into separate units, one per x86 core. Each cache block is responsible for its own coherency in a distributed structure that does not require a central arbiter.
The ring delivers about 96 Gbytes/second per connection at a 3 GHz data rate, as much as four times the on-chip bandwidth available to Intel's previous processor cores. It takes one clock cycle for data to progress one step on the ring. Traversing the full ring could take 26 to 31 clocks, Kahn estimated.
Intel is far from unique in its use of rings. The latest eight-core network processors from NetLogic Microsystems also use a ring interconnect.
Sandy Bridge links last-level cache blocks and cores on a ring
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rick.merritt
9/14/2010 1:46 AM EDT
What do you think of Sandy Bridge and how it will stack up against AMD's chips?
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kinnar
9/14/2010 4:03 AM EDT
AMD is working hard on its Bulldozer Architecture to compete intel's Sandy Bridge.
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unknown 314
9/14/2010 3:55 PM EDT
Most of Intel's new architectures seem to be weak on DMA bandwidth. If you can't get your data to the CPU it doesn't matter how fast the CPU is.
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kinnar
9/14/2010 4:10 AM EDT
Lately in 2011 with 8 core Xeon Processors it is expected to have Dual Xeon based workstations working at 500Gflops, that's really an extraordinary computing power.
Now realtime HD Video encoding can be done realtime without using extra hardware. Lets wait for the operating systems to take the benefit of added power of sandy bridge.
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KB3001
9/14/2010 4:51 AM EDT
The devil is indeed in the software. I like the separate power and frequency domains and turbo mode features, but how easy/convenient is it to control these knobs in software? I guess Intel will go down the road of optimised libraries as before.
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p51
9/14/2010 9:42 AM EDT
I'm curious is Intel actually designing the graphics component of this chip? I wouldnt have imagined Intel were a graphics house, and it seems a bit quick for them to have a graphics solution in place.
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goafrit
9/14/2010 2:35 PM EDT
The challenge today is not the hardware, rather the software to control them. Anyone in this industry understands that the software is the limiting factor to performance. It is not just going heterogeneous; what is the software roadmap. These systems could become unmanageable that they may fail in performance.
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bionicman
9/14/2010 4:09 PM EDT
The challenge with any complex computer architecture is to be able to optimize the software to take full advantage of its potential power. I will be interested in seeing what the realizable performance will be with a wide variety of software processes.
This is an important issue since the existence of Apple Computer is in part based on the unfulfilled need for an optimizing compiler for for the Motorola 68000.
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LarryM99
9/14/2010 4:41 PM EDT
I've got to wonder how much it matters. I just ordered the parts for a new HTPC, and I went with a low-end i3 540 CPU. Anything more than that would be a waste. I got more bang by using an SSD as a boot drive. Even that is enough to do graphics decode, even for Blu-Ray.
Granted some applications always need more CPU. They are getting to be few and far between, though.
Larry M.
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rick.merritt
9/14/2010 6:51 PM EDT
@ DSP SurfGuy: Yes, Intel is designing its own graphics blocks for Sandy Bridge but they are not planning any discrete graphics chips
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fdunn
9/14/2010 7:49 PM EDT
"There are no exclusive DX11 games out today, and DX11 is around the corner for Intel based products," said Tom Piazza, an Intel fellow who led the graphics core design.
Then why don't we wait "around the corner" as AMD are DX11 compliant and all it takes is that service pack or killer app to relegate this to the trash.
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Neo1
9/14/2010 11:21 PM EDT
Already the software industry is struggling to tame the multicore monster and now this heterogeneous stuff is being splashed at them, mercy! I wonder how Intel plans to support the software developers other than giving them some bits to tweak in the hardware. They were devoting quite a lot of energy on their software tools with purportedly multicore programming support. Unless these companies churning out different hardware architectures by the day collaborate with software industry in bringing solutions, all of these will be destined for the very niche markets.
They failed in the GPU+CPU marriage but looks like they want to leverage that work somehow and keep their future interesting.
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resistion
9/15/2010 1:38 PM EDT
Sandy Bridge is very much like Tunnel Creek Atom-based SOC, with integrated graphics and memory controller. It looks like Intel has no choice but to put more features that were previously off-chip (as chipsets) onto the same chip as the CPU, just to distinguish itself. It's the same trend to SoC. Where will it end? Would they even try putting memory and/or analog on the same chip as the CPU?
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I.S.YU
9/17/2010 9:29 PM EDT
@resistion: Yes, the concepts are same but used GPUs are different. TunnelCreek use GMA5xx(or GMA6xx) which is developed by Imagination Technology(PowerVR SGX) not by Intel.
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jimcondon
9/19/2010 10:24 PM EDT
One of the cool things about the Sandy Bridge is that since the graphics are on the chip, they have used the same Boost technology to the GPU that they use on the CPU. There was a demo showing 10 1080P HD clips being played back at IDF.
I don't know how that horsepower will be used but I bet someone will use it. The comments about CPU overkill make me chuckle, because they are always wrong. Archimedes said: "Give me a place to stand and I can move the world". Moore's law has given many brilliant people a place to stand.
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