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EDA startup ATopTech establishes board of directors
Anne-Francoise Pele
9/22/2010 6:08 AM EDT
PARIS – IC physical design startup Atoptech Inc. said it has recruited EDA and semiconductor experts to establish a board of directors that will provide guidance as the company continues to develop its long-term technology and business roadmap.
Atoptech said the company's board gathers chairman Wu-Fu Chen, partner at Dragon Investments Fund; Jue-Hsien Chern, Ph.D., CEO of ATopTech; Jackson Hu, Ph.D., Chairman and CEO of NeoEnergy Microelectronics; Ping-San Tzeng, President and CTO of ATopTech; and Sang Wang, Ph.D., currently on the boards of Altos Design Automation, Anchor Semiconductor, and Silicon Frontline Technology.
To view a short bio of ATopTech's chairman and members of the board, click here.
Atoptech (Santa Clara, Calif.) was formed in 2003 by IC placement and routing experts, including some who helped develop the ArcCell, Apollo and Astro products at Avanti Corp.
Atoptech's first product, Aprisa, was initially released in December 2006. It is a netlist-to-GDSII physical design solution that includes floorplanning, placement, clock tree synthesis (CTS), global routing, and detailed routing. Aprisa is compatible with all industry standards. In order to support flat design methods, the tool can handle over 2 million instances and has native support for multiple VDD and voltage islands, the company claimed.
In January, Atoptech appointed a new CEO, Jue-Hsien Chern, to lead the company to the next phase of development.
Atoptech said the company's board gathers chairman Wu-Fu Chen, partner at Dragon Investments Fund; Jue-Hsien Chern, Ph.D., CEO of ATopTech; Jackson Hu, Ph.D., Chairman and CEO of NeoEnergy Microelectronics; Ping-San Tzeng, President and CTO of ATopTech; and Sang Wang, Ph.D., currently on the boards of Altos Design Automation, Anchor Semiconductor, and Silicon Frontline Technology.
To view a short bio of ATopTech's chairman and members of the board, click here.
Atoptech (Santa Clara, Calif.) was formed in 2003 by IC placement and routing experts, including some who helped develop the ArcCell, Apollo and Astro products at Avanti Corp.
Atoptech's first product, Aprisa, was initially released in December 2006. It is a netlist-to-GDSII physical design solution that includes floorplanning, placement, clock tree synthesis (CTS), global routing, and detailed routing. Aprisa is compatible with all industry standards. In order to support flat design methods, the tool can handle over 2 million instances and has native support for multiple VDD and voltage islands, the company claimed.
In January, Atoptech appointed a new CEO, Jue-Hsien Chern, to lead the company to the next phase of development.
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