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phoenixdave
Gate first seems to make more sense from a foundry perspective, since it can be ...
wilber_xbox
Here again TSMC seems to have a upper hand by following the footsteps of Intel. ...
IBM 'fab club' denies problems with high-k
Mark Lapedus
9/27/2010 8:31 PM EDT
SAN JOSE, Calif. - Members of IBM Corp.'s technology alliance, namely GlobalFoundries Inc. and Samsung Electronics Co. Ltd., dismissed a report that the group is struggling with its high-k/metal-gate technology.
High-k/metal-gate ''technology enables traditional scaling of the electrical gate dielectric and reduced standby power of transistor due to a reduction in gate leakage,''said Andrew Lu, an analyst with Barclays Bank, in a report.
''There has been a recent divergence in wafer processing technology to either choose 'gate-first' or 'gate-last' for (high-k/metal-gate),'' Lu said. ''Gate-first and gate-last are terms that refer to whether the metal gate electrode is deposited on wafer before or after the high-temperature activation anneals of flow processing.''
Intel Corp., Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) and others have moved towards ''gate-last'' technology. Intel has been shipping processors based on high-k since the 45-nm node. Intel has shipped two generations of high-k. TSMC has yet to ship its technology.
In contrast, IBM's ''fab club'' is using a ''gate-first'' technology. But to date, IBM's technology partners have yet to ship high-k--at least in chips in mass volumes. Advanced Micro Devices Inc. is expected to ship its first processors based on high-k in the first part of 2011. AMD is using IBM's technology.
''The gate-first technology adopters (including Sematech and Fishkill Alliance technology partners such as IBM, Infineon, NEC, Globalfoundries, Samsung, STMicroelectronics and Toshiba) have encountered some problems, we understand, related to thermal instability, threshold voltage shifts and re-growth in the gate stack, which is serious for pMOS (positive type metal oxide semiconductor) at scaled electrical oxide thickness,'' Lu said.
''We expect TSMC will be able to lead its competitors on the 28-nm migration using the gate-last high-k/metal-gate technology,'' Lu said.
One IBM ''fab club'' member, GlobalFoundries, dismissed the report and issued the following response to Lu's research note:
''There have been some misconceptions about the gate-first approach to high-k/metal-gate. We do not regularly engage with financial analysts like Barclay’s because we are a private company, so I don’t think they have the latest information.
Gregg Bartlett, our SVP of technology and R&D, addressed a number of these misconceptions in his presentation at (recent) GTC 2010 (conference). You can see that there are no Vt stability issues and gate-first offers comparable or superior performance when compared to gate-last approaches. Our 32-nm high-k/metal-gate ramp is in early production at Fab 1 and we are confident in our ability to deliver for our customer and maintain our time-to-volume leadership position in the foundry industry. We are currently accepting designs for all of our 28-nm technologies. Multiple customer designs have already been silicon-validated, and many more test chips are in prototyping at Fab 1 on the way to early risk production late this year.''
Samsung Electronics issued this response:
''As you may recall, Samsung announced in early June the full qualification of 32-nm low power high-k metal gate in our S Line. That qual included a full 1000 hr high temp operating life (HTOL) and have experienced no such problems.''
High-k/metal-gate ''technology enables traditional scaling of the electrical gate dielectric and reduced standby power of transistor due to a reduction in gate leakage,''said Andrew Lu, an analyst with Barclays Bank, in a report.
''There has been a recent divergence in wafer processing technology to either choose 'gate-first' or 'gate-last' for (high-k/metal-gate),'' Lu said. ''Gate-first and gate-last are terms that refer to whether the metal gate electrode is deposited on wafer before or after the high-temperature activation anneals of flow processing.''
Intel Corp., Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) and others have moved towards ''gate-last'' technology. Intel has been shipping processors based on high-k since the 45-nm node. Intel has shipped two generations of high-k. TSMC has yet to ship its technology.
In contrast, IBM's ''fab club'' is using a ''gate-first'' technology. But to date, IBM's technology partners have yet to ship high-k--at least in chips in mass volumes. Advanced Micro Devices Inc. is expected to ship its first processors based on high-k in the first part of 2011. AMD is using IBM's technology.
''The gate-first technology adopters (including Sematech and Fishkill Alliance technology partners such as IBM, Infineon, NEC, Globalfoundries, Samsung, STMicroelectronics and Toshiba) have encountered some problems, we understand, related to thermal instability, threshold voltage shifts and re-growth in the gate stack, which is serious for pMOS (positive type metal oxide semiconductor) at scaled electrical oxide thickness,'' Lu said.
''We expect TSMC will be able to lead its competitors on the 28-nm migration using the gate-last high-k/metal-gate technology,'' Lu said.
One IBM ''fab club'' member, GlobalFoundries, dismissed the report and issued the following response to Lu's research note:
''There have been some misconceptions about the gate-first approach to high-k/metal-gate. We do not regularly engage with financial analysts like Barclay’s because we are a private company, so I don’t think they have the latest information.
Gregg Bartlett, our SVP of technology and R&D, addressed a number of these misconceptions in his presentation at (recent) GTC 2010 (conference). You can see that there are no Vt stability issues and gate-first offers comparable or superior performance when compared to gate-last approaches. Our 32-nm high-k/metal-gate ramp is in early production at Fab 1 and we are confident in our ability to deliver for our customer and maintain our time-to-volume leadership position in the foundry industry. We are currently accepting designs for all of our 28-nm technologies. Multiple customer designs have already been silicon-validated, and many more test chips are in prototyping at Fab 1 on the way to early risk production late this year.''
Samsung Electronics issued this response:
''As you may recall, Samsung announced in early June the full qualification of 32-nm low power high-k metal gate in our S Line. That qual included a full 1000 hr high temp operating life (HTOL) and have experienced no such problems.''
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resistion
9/28/2010 11:24 AM EDT
Intel's high-k process, if I recall, has many extra process steps and complexity, including dummy polysilicon gate removal, and multi-metal deposition. Even so, it became a high-volume process. Yet Atom still consumes too much power for some. It will be interesting to see AMD gate-first vs. Intel gate-last CPU benchmarks.
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mike655mm
9/28/2010 7:19 PM EDT
Atom, of course, also targets handhelds where very low power is a must. Todate, though, Atom is still made with the 1st generation 45nm high-k process. It'll really start getting interesting when it comes out on the 2nd gen 32nm & 3rd gen 22nm processes
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wilber_xbox
9/29/2010 3:15 PM EDT
Here again TSMC seems to have a upper hand by following the footsteps of Intel. As Intel has shipped two generations of high-k dielectric based processors so the technology is proven. Only after AMD ships its processors, we will know which technology is better and has a smooth road ahead.
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phoenixdave
9/29/2010 6:10 PM EDT
Gate first seems to make more sense from a foundry perspective, since it can be integrated into an existing process line without too many changes. The foundry business has to focus on integrating the needs of many different clients and products, not just one (like microprocessors). Low-cost integration across a product group is essential for success, otherwise equipment and production costs will eat you alive.
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