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EDA startup targets debug, validation
Dylan McGrath
11/1/2010 6:40 PM EDT
SAN FRANCISCO—An EDA startup spun out of research at the University of British Columbia (UBC) came out of stealth mode Monday (Nov. 1) offering what it says is to a breakthrough technology for post-silicon debug and validation.
Veridae Systems Inc. (Vancouver) said its technology provides unprecedented visibility into the IC at all stages of validation, allowing engineers to pinpoint and understand unexpected behaviors, correct problems and rapidly move devices into production. The company claims that its technology can enable designers to resolve in hours debug problems that previously required weeks or months.
Veridae's flagship product, the Clarus Post-Silicon Validation Suite, is a silicon debug toolkit that provides visibility into the operation of complex SoCs, FPGAs and ASICs, according to the company. Clarus provides simulation-style visibility into device behavior throughout the design cycle, from initial single- and multi-FPGA prototypes through IC production, according to the company. Clarus can help designers to avoid re-spins and can reduce the overall development time by 10 to 30 percent, the company said.
Veridae is led by Chairman and CEO Jim Derbyshire, formerly CEO of SiGe Semiconductor and Symbionics. The company's technology evolved from research at UBC done by Brad Quinton, now the chief technology officer of Veridae.
Quinton said Veridae's technology addresses the rising complexity of semiconductors. ICs are becoming both more complex and are operating at faster speeds—a combination that has pushed the limits of conventional debug solutions, he said. Up to 50 percent of the overall development time of complex ICs is now consumed between the arrival of initial prototypes and the final production release, Quinton said.
Because of the technology's potential to address one of chip companies' biggest pain points—the validation process—Veridae has found some initial interest, Quinton said. "We are finding a receptive audience," Quinton said.
Quinton noted that the environment for EDA startups is very different than it was a few years ago, primarily because venture capital has dried up considerably in the past two years. "The easy old days of raising a couple million dollars with a Powerpoint slide are gone for now," Quinton said.
But Quinton said advances on some fronts have actually made it easier and less costly for an EDA startup to get rolling. Many of the pieces needed to develop an EDA product are more available and less costly than they were previously, he said. For example, Veridae used standard software platform from vendor Verific Design Automation Inc. as the backbone for its tool suite, he said.
"It just changes the model, where you don't need $10 million, you can do angel investment and different types of target investments" to get started, Quinton said.
A flow chart describing the Clarus Suite infrastructure.
The Clarus Suite is available now. Pricing information was not disclosed. In addition to the software suite, Veridae said it also offers on-site debug design support services.
Veridae Systems Inc. (Vancouver) said its technology provides unprecedented visibility into the IC at all stages of validation, allowing engineers to pinpoint and understand unexpected behaviors, correct problems and rapidly move devices into production. The company claims that its technology can enable designers to resolve in hours debug problems that previously required weeks or months.
Veridae's flagship product, the Clarus Post-Silicon Validation Suite, is a silicon debug toolkit that provides visibility into the operation of complex SoCs, FPGAs and ASICs, according to the company. Clarus provides simulation-style visibility into device behavior throughout the design cycle, from initial single- and multi-FPGA prototypes through IC production, according to the company. Clarus can help designers to avoid re-spins and can reduce the overall development time by 10 to 30 percent, the company said.
Veridae is led by Chairman and CEO Jim Derbyshire, formerly CEO of SiGe Semiconductor and Symbionics. The company's technology evolved from research at UBC done by Brad Quinton, now the chief technology officer of Veridae.
Quinton said Veridae's technology addresses the rising complexity of semiconductors. ICs are becoming both more complex and are operating at faster speeds—a combination that has pushed the limits of conventional debug solutions, he said. Up to 50 percent of the overall development time of complex ICs is now consumed between the arrival of initial prototypes and the final production release, Quinton said.
Because of the technology's potential to address one of chip companies' biggest pain points—the validation process—Veridae has found some initial interest, Quinton said. "We are finding a receptive audience," Quinton said.
Quinton noted that the environment for EDA startups is very different than it was a few years ago, primarily because venture capital has dried up considerably in the past two years. "The easy old days of raising a couple million dollars with a Powerpoint slide are gone for now," Quinton said.
But Quinton said advances on some fronts have actually made it easier and less costly for an EDA startup to get rolling. Many of the pieces needed to develop an EDA product are more available and less costly than they were previously, he said. For example, Veridae used standard software platform from vendor Verific Design Automation Inc. as the backbone for its tool suite, he said.
"It just changes the model, where you don't need $10 million, you can do angel investment and different types of target investments" to get started, Quinton said.
A flow chart describing the Clarus Suite infrastructure.
The Clarus Suite is available now. Pricing information was not disclosed. In addition to the software suite, Veridae said it also offers on-site debug design support services.
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