Is IBM serious about phase-change memory for servers?

11/3/2010 11:16 AM EDT

IBM has many system builders and software people who believe phase change memory will give tremendous benefits. Especially if it is 3D stacked and used as a storage class memory. However, the internal IBM work developing 3D PCM has not been very successful thus far (its a hard problem to crack).

11/3/2010 11:20 AM EDT

I taught a grad course on memories back in 2004, one of the lectures covered emerging Phase Change Memories...6 years has passed and the PCM remains an emerging and promising technology ;-)...who is the technology leader here? I don't think it is IBM...Kris

11/3/2010 11:39 AM EDT

IBM's management must have eaten some hallucinogenic mushrooms at some retreat or something. That's the only explanation. IBM management should be ashamed of their lies that PCM "has the potential to reduce by three orders of magnitude the power consumed and the amount of space consumed by servers." First, PCM writes by melting stuff, thus, its power consumption in write is horrible. Second, the densest PCM chip still needs 4x the space compared to DRAM for the same amount of storage and 128x the space compared to Flash.

Of course, by using imaginary chips, one can always create imaginary servers. The fact is, IBM has not produced even one phase-change memory chip. And the best phase-change memory chips that Micron & Samsung can offer still write at less than 1 megabyte per second. In other words, a real server using DRAM & Flash will be at least 1000x as fast as a real server using PCM. Oh, and the real server using DRAM & Flash will be at least 100x cheaper and at least 5x smaller.

That is why no product on the market (except a couple of development kit boards) uses any PCM, despite PCM being "commercial" since 2006.

PCM is the longest-running techno-Ponzi scheme. It is just a shame that some people still fall for it.

11/3/2010 11:42 AM EDT

@iniewski

Numonyx now Micron and Samsung are probably the leaders in phase-change memory


@3D Guy

"systems builders and software people" may explain it. Maybe they actually believe that PCM can scale, but on what basis?

11/3/2010 6:14 PM EDT

When Neale wrote his article he was very selective in quoting from item 0016 of the ST Micro patent. The very next item is more important:

BRIEF SUMMARY [0017] Embodiments include a resistive cell and a method for manufacturing a resistive cell, which are free from the above described limitations.

I believe it was very disingenuous of Neale to omit item 0017 from his quote.

Copy this title:
"RESISTIVE MEMORY CELL AND METHOD FOR MANUFACTURING A RESISTIVE MEMORY CELL"

Into the search field here:
http://www.google.com/patents

11/4/2010 12:03 AM EDT

Replacing DRAM is a stronger claim to make than replacing Flash. How many cycles does phase change memory have to show to qualify as a DRAM replacement in servers? The current Numonyx spec of one million seems a tad short.

11/4/2010 11:15 AM EDT

The justification statement #016 that I cited was an admission of problems related to PCMs based on chalcogenides and from the very heart of the PCM action.
While PCM is a resistive memory, the term is nowadays more used colloquially to describe NV memory types based on other mechanisms. I thought I had acknowledged the resistive memory statement when I suggested those applying for the patent were hedging their bets in that same “Hoist by their own Petard Paragraph”.
I am not a patent lawyer (attorney) but for me the use of the term resistive cell memory in statement #017 is the all embracing way of providing protection for the new structure in its use as both an improved PCM and for any of the competing NV resistance memory devices (ReRAMs) and (PMCs). Only time and money will tell if it solves the PCM problems it acknowledges.

11/4/2010 3:21 PM EDT

Too many cooks spoils the food, may be Too Many Different RAMs/ROMs with different Technologies and Different Materials will not spoil/corrupt the Data or the Life of the Data.
So ReRAM and PCM new names are coming up but it will still require a long path to get accepted for production.

11/4/2010 3:24 PM EDT

Mr. Neale, I believe you are performing an important service it playing the devil's advocate against the often rosy claims of amazing developments in PCM, but you shouldn't lean so far to the devil's side that you cease being an honest broker. I was intrigued when in a recent post you suggested the researchers should revisit some of Stan Ovshinsky's early work on devices that exhibited seemingly impossible behavior.

I assume that the broad-scope use of "materials which may be switched..." in item 0038 is actually a disclosure of the fact that they are working with other mixes of elements that may change resistance without actually making a crystalline to amorphous change. The materials science papers are full of descriptions of "stuff" that does some kind of funky change in the crystal structure that causes a significant change in resistance. (from either current, heat or laser pulse) The cell design in the patent app seems simple enough, all it needs is the right "stuff" as the memory material. My bet is on a mixture that includes terbium.

11/5/2010 6:53 AM EDT

The work of Ovshinsky and LeComber that I was referring to was the observation of small step like discontinuities in the pre-breakdown threshold switching characteristics.
It was easy at the time to dismiss these as dirty contact effects, but there was always one troubling problem with that explanation. The steps were always equally spaced on the voltage scale, or exact multiples of that spacing.
About ten years later Professor Peter LeComber at U of Dundee, Scotland reported observing similar effects in amorphous silicon. (Published in the Journal of Non-Crystalline Solids).
My understanding is the explanation in both cases was the result of the formation of short nano-filaments in the conduction path.
Of the earliest observations, other than a dirty contact effect, the possibility that the conducting region was moving across regularly spaced atomic surface layers or crystal boundaries was also offered.
I guess the point I was trying to make is that electrical or electronic manipulation of structure, albeit on a nano scale, by the selectively formation and removal of detectable nano-filaments might offer a more stable NV memory than an amorphous to crystalline transition. That is the structural shape on the nano-scale is the memory.
The behavior was not impossible, it was observed, in one case by this writer, it is only the explanation may be wrong (impossible)

11/7/2010 11:45 AM EST

PCM certainly faces some significant technology challenges, but I think IBM is right to see it as a potentially transformative technology, especially for storage. If PCM follows even somewhat optimistic trends in terms of scaling and performance, it will will dramatically speedup storage. A group at UC San Diego recently built a prototype storage array to explore the potential impacts (google "moneta UCSD"). The performance they achieve is impressive.

11/7/2010 1:07 PM EST

Any storage medium must be qualified on retention. The PCM can't survive at 150 C and has the problem of drifting resistance and threshold voltages.

6/3/2011 1:51 PM EDT

I agree with Peter and would be very skeptical of any academic claims...there is a wide gap between what academics think and what actually works ;-)...I have been on both sides of this divide and have seen this difference of point of views thousands of times...Kris

6/3/2011 7:09 PM EDT

@inewski The academic claims are made from testing actual PCM devices (Micron NP8P128A13B1760E), not just what they think. Scaling could be an issue, so remains to be seen. PCM with a vertical access device would be really nice, though...
Memorywranglers link was bad, so try this: http://cseweb.ucsd.edu/users/swanson/papers/HotStorage2011-Onyx.pdf

The PCM devices are qualified for 85C, similar to current Flash; 150C is a high temperature, automotive spec.

6/3/2011 7:22 PM EDT

Why not use NOR flash then, all these PCMs are positioned as NOR drop-ins.

6/4/2011 10:44 AM EDT

To @xprmntl, academic testing is very different than industrial testing...I worked as a prof at 5 universities around the globe in my career and most of my academic colleagues would test one device, make few measurements, write a paper and move on...needless to say in industry you test things thousands if not millions of times, very, very different, Kris

6/6/2011 11:00 AM EDT

PCMs have 30X or better write times (Samsung claim) than NOR and are low voltage (~2V vs 10V+).

@Kris, The memory chip in this case is an industrial prototype, not university-made, thus it has already been tested to meet certain cycling specifications by the manufacturer (though as a prototype part, the study found write performance issues). This was not a test of the PCM, but rather a new PCM _drive architecture_ and _software_ for speed benchmarking. I fail to how extended cycling times will make a test of the architecture any different?