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vivekv80
It will be interesting to see how they perform against FPGAs.
Robotics Developer
Looks like an interesting and bold move! I would be curious to see just how ...
TI to put floating point in every DSP core
Junko Yoshida
11/9/2010 8:00 AM EST
NEW YORK – The cellular base station market is heating up – worldwide.
As this happens, the competition between Texas Instruments and Freescale Semiconductor over base station SoCs is accelerating. The companies are intensifying efforts to promote novel designs for DSP cores, accelerators and microprocessors – to enable flexible and powerful 3G and LTE/4G base stations.
Beyond cost, power consumption and performance, the battle of next-generation comms SoCs is expected to focus on how to run complex algorithms like MIMO multiple antenna processing – critical in broadband wireless networks – in new chips.
TI has chosen to put both floating point and fixed point math in every core of its new DSP, hoping to achieve the high accuracy demanded by MIMO applications. Freescale, in contrast, plans to do it in the company’s accelerator block called MAPLE, which uses a floating point engine inside.
TI announced Tuesday (Nov. 9th) a newly architected DSP – TMS320C66x – and four new scalable C667x devices, all produced using TSMC’s 40nm process. TI claims to offer “the industry’s first 10GHz DSP,” combining eight of its new DSPs, running at 1.25 GHz each.
TI is breaking new ground by integrating – for the first time in DSP history – both fixed point and floating point math in one core. Jeff Bier, Berkeley Design Technology, Inc. (BDTI), said TI is “significantly upping the ante,” by improving the new core’s ease of use for developers.
Using the new DSP cores, TI is also launching a four-core communications SoC, targeting both the 3G and LTE/4G markets. While defending its dominance in the legacy wireless standards-based base station market, TI is eager to demonstrate that the new SoC can lead the emerging 4G base station market – where Freescale has significantly stepped up the game over the last 18 months.
TI’s new communications SoC is designed to “simultaneously transmit and receive 3G and 4G data on the same silicon, with no additional ASIC or FPGA needed,” said Brian Glinsman, general manager, communications infrastructure, DSP systems group at TI.
TI, obviously, isn’t alone in throwing new technologies at growing challenges in the cellular network market.
EE Times has learned that Freescale is introducing next Monday (November 15th) a new generation DSP-based product. “It doubles the performance, while offering specific acceleration IPs designed to increase throughput,” said Lisa Su, Freescale’s senior vice president and general manager, networking and multimedia. Without leaking details, Freescale’s Su indicated that beyond the performance enhancements in the company’s new DSP, “we have quite a few tricks in the bag – include advancements in the accelerator side and the microprocessor side.”
Will Strauss, president of Forward Concepts observed, “Although Freescale doesn't have the market size of TI, they have introduced some very novel acceleration technology to augment their DSP chips, and have displaced TI in some base station design-ins.”
Still, Freescale faces an uphill battle against TI, which has its formidable presence in legacy 3G cellular networks. With the upcoming communications SoC, Freescale plans not only to add fuller 3G capabilities to its portfolio but also to beef up its performance for emerging cellular networks including LTE and upcoming LTE-Advanced (LTE-A) standards.
As the growing data traffic swamps cellular networks, operators are demanding that equipment suppliers deliver “significant reduction in cost per megabit” and a semiconductor solution that “runs on a common platform” (capable of handling both 3G and 4G/LTE networks), noted Su.
Next: Floating vs. fixed point
As this happens, the competition between Texas Instruments and Freescale Semiconductor over base station SoCs is accelerating. The companies are intensifying efforts to promote novel designs for DSP cores, accelerators and microprocessors – to enable flexible and powerful 3G and LTE/4G base stations.
Beyond cost, power consumption and performance, the battle of next-generation comms SoCs is expected to focus on how to run complex algorithms like MIMO multiple antenna processing – critical in broadband wireless networks – in new chips.
TI has chosen to put both floating point and fixed point math in every core of its new DSP, hoping to achieve the high accuracy demanded by MIMO applications. Freescale, in contrast, plans to do it in the company’s accelerator block called MAPLE, which uses a floating point engine inside.
TI announced Tuesday (Nov. 9th) a newly architected DSP – TMS320C66x – and four new scalable C667x devices, all produced using TSMC’s 40nm process. TI claims to offer “the industry’s first 10GHz DSP,” combining eight of its new DSPs, running at 1.25 GHz each.
TI is breaking new ground by integrating – for the first time in DSP history – both fixed point and floating point math in one core. Jeff Bier, Berkeley Design Technology, Inc. (BDTI), said TI is “significantly upping the ante,” by improving the new core’s ease of use for developers.
Using the new DSP cores, TI is also launching a four-core communications SoC, targeting both the 3G and LTE/4G markets. While defending its dominance in the legacy wireless standards-based base station market, TI is eager to demonstrate that the new SoC can lead the emerging 4G base station market – where Freescale has significantly stepped up the game over the last 18 months.
TI’s new communications SoC is designed to “simultaneously transmit and receive 3G and 4G data on the same silicon, with no additional ASIC or FPGA needed,” said Brian Glinsman, general manager, communications infrastructure, DSP systems group at TI.
TI, obviously, isn’t alone in throwing new technologies at growing challenges in the cellular network market.
EE Times has learned that Freescale is introducing next Monday (November 15th) a new generation DSP-based product. “It doubles the performance, while offering specific acceleration IPs designed to increase throughput,” said Lisa Su, Freescale’s senior vice president and general manager, networking and multimedia. Without leaking details, Freescale’s Su indicated that beyond the performance enhancements in the company’s new DSP, “we have quite a few tricks in the bag – include advancements in the accelerator side and the microprocessor side.”
Will Strauss, president of Forward Concepts observed, “Although Freescale doesn't have the market size of TI, they have introduced some very novel acceleration technology to augment their DSP chips, and have displaced TI in some base station design-ins.”
Still, Freescale faces an uphill battle against TI, which has its formidable presence in legacy 3G cellular networks. With the upcoming communications SoC, Freescale plans not only to add fuller 3G capabilities to its portfolio but also to beef up its performance for emerging cellular networks including LTE and upcoming LTE-Advanced (LTE-A) standards.
As the growing data traffic swamps cellular networks, operators are demanding that equipment suppliers deliver “significant reduction in cost per megabit” and a semiconductor solution that “runs on a common platform” (capable of handling both 3G and 4G/LTE networks), noted Su.
Next: Floating vs. fixed point
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VincePG
11/9/2010 11:57 PM EST
It's about time. Should make life easier.
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Robotics Developer
11/10/2010 5:23 PM EST
Looks like an interesting and bold move! I would be curious to see just how much of the base station design could be integrated into the new chips. Given the statements from the article, is there a real opportunity for some vendor to provide a best overall "system solution" chip by adding the needed features currently supported by the FPGAs? It would seem to be a big win, with such a large market waiting for a one chip (or maybe small chip set) solution that would be lower cost, smaller, and lower power needs. Just wondering if it is possible and if someone is already running down that path....
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vivekv80
11/18/2010 1:29 PM EST
It will be interesting to see how they perform against FPGAs.
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