Floating vs. fixed point
TI’s new C667x DSP
family is based on “KeyStone multicore architecture.” Under the
architecture, a multicore navigator ensures that the DSP core can
maximize the throughput of on-chip data flows and eliminates the possibility of bottlenecks.
BDTI’s Bier noted that TI’s new DSP core “slightly accelerates the clock speed, while it significantly improves parallelism.”
independent benchmark results showed that TI’s new 1.25 GHz C66x core
is 30 percent faster than TI’s previous generation DSP. (The C66x core
delivered a fixed-point BDTImark2000 score of 16,690 – beating
the 13,170 score of TI’s C64x+ core.) TI’s C66x also proved 10 percent
faster than Freescale’s SC3850 core which previously achieved a best of 15,420.
floating-point performance, the C66x sets a new bar for DSP processors
with a BDTImark2000 score of 10,720, according to Bier. BDTI is making
the details of the benchmark results
available at its website.
advantage of incorporating full-blown floating point math in every C66x
DSP core is clear, said TI’s Glinsman. “Developers can use the natural
math language (in floating point) to run applications’ algorithm. They don’t have to convert everything to fixed point operations.”
case in point is MIMO multiple antenna applications. With floating
point in each DSP core, developers can “leave complex numeric algorithms
such as MIMO applications to floating point,” explained Bier.
For something like MIMO application, which is “super touchy” and
requires “high accuracy,” Bier said that not having to do matrix
inversion is a huge win for developers.
floating point has been “an unloved step child” in the DSP family, said
Bier. “It didn’t get much investment, because companies always looked
for high volume applications for their DSPs.” Such high volume
applications almost always demand highly optimized cost, power
consumption and performance, all best served by fixed point operations.
the emergence of more complex applications often demanded by cellular
networks may challenge the conventional wisdom. “At a time when the size
of engineering team is shrinking and the window for a
development cycle is getting narrower,” said Bier, ease of use becomes
paramount for many developers. With floating point math in every DSP
core, “I think TI will change the game,” Bier concluded.
agrees with TI that using floating point DSP for MIMO antenna
processing has merit, accomplishing the accuracy demanded by MIMO. But
Freescale is taking a different next-generation approach, according to
Scott Aylor, director of DSP products at Freescale’s networking &
He explained that MIMO antenna processing demands
“precision,” but is also “very time critical.” While the use of
floating point DSP cores can enhance accuracy, it “incurs a time
penalty,” said Aylor. That’s because floating point operations take two
to four times more core cycles. Freescale believes equipment vendors
won’t tolerate such latency. According to Aylor, Freescale is using a
dedicated engine in the company’s MAPLE (Multi Accelerator Platform
Engine) accelerator block to offload the multiple-antennas processing
function. Meanwhile, “we can allow our customers more DSP core capacity
to apply to other differentiated tasks in the system,” he added.
isn’t dismissing the use of floating point, though. Aylor said: “This
accelerator block in MAPLE uses a floating point engine inside. It
provides the accuracy required but has a much higher throughput.” Freescale
expects this higher throughput to offer “significantly improved latency
performance over a floating point DSP core based solution,” said Aylor.