Update: Intel confirms 450-mm fab plans

12/8/2010 6:24 PM EST

I did a blog on the 450mm Semiconductor Manufacturing Debate, which was based on one of the longest LinkedIn debates I have seen.
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http://danielnenni.com/2010/05/23/450mm-semiconductor-manufacturing-debate/

450mm will happen, believe it!

12/9/2010 3:52 AM EST

I have a little doubt- wouldn't moving to larger and larger die areas constitute a risk of higher variance in silicon properties on the same die?

12/9/2010 12:56 PM EST

450mm would be about 2 years earlier but the economic downturn slowed everything down and pushed out any 450mm plans. This is now mainly a question of money. The equipment suppliers paid mainly the prize for the 300mm transition which began back in 1996 to 2000. Who is paying now? Well the ones who have the money: Intel, TSMC, Samsung, maybe two more. This will trigger a domino effect which means more companies feel encouraged to jump on the train. However, these fabs and tools will be very expensive, so I see JVs and Alliance first.

12/9/2010 2:20 PM EST

I have watched the fortunes of the semiconductor manufacturers improve with wafer size while their support vendors have been on a sort of increasing financial diet. US mask vendors in particular were beggered by playing vendors against one another leaving none with the funding levels for R&D that the semiconductor houses enjoyed. The result was predictable.

In the 150/200mm transition, efficiency and yield improved for the fabs while the tool vendors found themselves selling fewer tools with which to cover their development costs. They learned the lesson.

As long as there is sufficient financial incentive for S/C tool and support vendors to thrive, rather than just survive, then 450mm will happen in a timely fashion. Otherwise vendors will predictably drag their feet until the semiconductor companies come forward to share in the expense of the requisite R&D funding.

Several years ago, a major customer requested us to gear up a fab in advance for the the production of their new device still in design. It was an expensive request with a lot of risk if they did not follow through with the orders. A clever gentleman within our organization struck an agreement where the customer would buy all the required expansion equipment which we would install then build the devices for them at an adjusted price. If the customer had defaulted, we were protected and they were out a significant sum.

Hard investment dollars by the customer(s) is best grease to get things unstuck.

12/9/2010 6:32 PM EST

more time passed between 300mm and whatevercomesnextmm, than between any two wafer size introductions in history. That's because it was so good at what it sought to do; reduce chip cost. Along the way, we also cut global warming gases per chip and made many other improvements.

12/10/2010 11:47 AM EST

Ok so finally 450mm is here, any guesses what next ?

12/10/2010 1:30 PM EST

I think the industry should start development of 725-mm.....

12/10/2010 1:33 PM EST

PS- I was being facetious above. It sounds like there has been more progress on 450-mm than I realized. I'm still not convinced that 450 will be in production anytime soon, or that it will ever have mass appeal, even for the handful of companies that can afford it. But time will tell.

12/11/2010 1:01 AM EST

On collaboration to cut design and manufacturing costs certainly. On economics, Moore’s objective has presented an issue sub micron and all the time. Should industry double transistor density every 18 to 24 months on a pressed lithography schedule’s economics? Acknowledging Rock’s insight of doubling investment dollars each process generation has die economics become a fallacy? Where Intel has raced lithography inorganically how many nodes ahead to achieve its own process gains and too who’s benefit? When producing sequential short runs of surplus offer’s no economic profit too pay for this inefficiency over the long run? Too support producers or enablers of these subordinate economic effects? And now on trailing edge of CMOS average cost curve should development dollars be invested toward deflationary production scenarios on inflationary cost structures? Does 300mm+ acknowledge transition from industrial commercial art back towards applied science? Too bridge across a monopoly divide in development dollars toward all of our molecular futures? Meaning lithography, materials and etch but not harvesting on larger wafers. A monopoly aim whose time has past? Where competitors in this race have recognized their math error? Finally, IDM and end markets should pay more for this leading performance hardware enablement not less. Mike Bruzzone, Camp Marketing Consultancy

12/11/2010 12:57 PM EST

450 mm and sub-10 nm node are appropriately relegated to unimaginable future.

12/23/2010 7:41 PM EST

As expected its on now, and not the nikon is the supplier for the fabtool. Its kind of combination from applied, asml and nikon last. As nikon had serious problems with extreme litho its was the reason why intel initially announced different than expected.

No matter who says what, as the leader is in, every other big guy will follow him, so 450 is in place. However i dont think we could see 450 with sub-14nm as litho gets mad, and materials goes crazy. I wonder when 3D chip sets will be in place.

12/23/2010 8:01 PM EST

i somehow missed this report. This is really something which was more like a rumor to save cost at 20x and 10x nodes.