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IFTLE
This is very old news. Memory on logic as the driver for 3DIC has been proposed ...
resistion
@Abhijit.Deb: Doesn't the interposer use TSV?
Volume driver spotted for 3-D TSVs
Mark LaPedus
1/12/2011 2:34 PM EST
HALF MOON BAY, Calif.—For years, chip makers have been talking about 3-D chips based on through-silicon vias (TSVs).
But except for select products—such as CMOS image sensors—the technology has not moved into the mainstream, due to costs, lack of standards and other factors. Now, chip makers may have identified a new device vehicle that could propel TSV-based 3-D chips into the mainstream: a wide I/O DRAM for cell phones and related products.
One group is seeking to accelerate this technology into the marketplace. Last month, Sematech, SIA, and SRC announced a program to drive industry standardization and the technical specifications for heterogeneous 3-D integration.
At that time, the group provided few details about the effort. During SEMI’s Industry Strategy Symposium (ISS) here, Daniel Armbrust, president and chief executive of Sematech, disclosed that some 10 to 15 companies will join the effort.
The group hopes to accelerate the development of the technology. The "introduction vehicle" for the effort is a wide I/O DRAM for cell phones, he said. Device production is targeted for 2013.
There is a need for a new mobile memory solution. Current mobile systems use mobile DDR interface technology. Now, to boost memory bandwidth, a new mobile interface technology called LPDDR2 is ramping up. Going beyond LPDDR2, vendors claim that a new technology is required for future bandwidth needs. Some of the future candidates include SPMT, MIPI, Rambus’ XDR and 3-D based TSVs.
Experts define a true 3-D package as one that stacks various chips vertically and then connects them by deploying TSVs. The aim is to shorten the interconnections between the chips, reduce die sizes and boost device bandwidths.
So far, chip makers are shipping limited 3-D devices based on TSVs, mainly CMOS image sensors, MEMS, and, to some degree, power amplifiers. One of the big and recent announcements in the arena came from Xilinx Inc., which recently discussed a "stacked silicon interconnect" FPGA.
There are several problems with TSV technology: Lack of EDA design tools; complexity of designs; integration of assembly and test; cost; and lack of standards.
But except for select products—such as CMOS image sensors—the technology has not moved into the mainstream, due to costs, lack of standards and other factors. Now, chip makers may have identified a new device vehicle that could propel TSV-based 3-D chips into the mainstream: a wide I/O DRAM for cell phones and related products.
One group is seeking to accelerate this technology into the marketplace. Last month, Sematech, SIA, and SRC announced a program to drive industry standardization and the technical specifications for heterogeneous 3-D integration.
At that time, the group provided few details about the effort. During SEMI’s Industry Strategy Symposium (ISS) here, Daniel Armbrust, president and chief executive of Sematech, disclosed that some 10 to 15 companies will join the effort.
The group hopes to accelerate the development of the technology. The "introduction vehicle" for the effort is a wide I/O DRAM for cell phones, he said. Device production is targeted for 2013.
There is a need for a new mobile memory solution. Current mobile systems use mobile DDR interface technology. Now, to boost memory bandwidth, a new mobile interface technology called LPDDR2 is ramping up. Going beyond LPDDR2, vendors claim that a new technology is required for future bandwidth needs. Some of the future candidates include SPMT, MIPI, Rambus’ XDR and 3-D based TSVs.
Experts define a true 3-D package as one that stacks various chips vertically and then connects them by deploying TSVs. The aim is to shorten the interconnections between the chips, reduce die sizes and boost device bandwidths.
So far, chip makers are shipping limited 3-D devices based on TSVs, mainly CMOS image sensors, MEMS, and, to some degree, power amplifiers. One of the big and recent announcements in the arena came from Xilinx Inc., which recently discussed a "stacked silicon interconnect" FPGA.
There are several problems with TSV technology: Lack of EDA design tools; complexity of designs; integration of assembly and test; cost; and lack of standards.
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greenpattern
1/12/2011 11:02 PM EST
DRAM packages still have thermal considerations. A TSV package will be much worse than conventional.
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resistion
1/12/2011 11:12 PM EST
DRAM may be a prime application, but its market is too weak to be a real enthusiastic driver until 2013.
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resistion
1/12/2011 11:16 PM EST
Case in point: http://www.pcper.com/article.php?aid=1062
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Nic_Mokhoff
1/13/2011 10:11 AM EST
Last paragraph reiterates it all, about the issues of tools, complexity, integration and standards. It will take a monumental industry-wide effort to come up with feasible production line three-dimensional chips. And it needs design, process and production disciplines to come together to resolve various different approaches. The SIA/SRC collaboration and the SEMI efforts are only a starting point.
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Abhijit.Deb_#1
1/14/2011 2:41 AM EST
Although the article does not say it explicitly, I assume the wide I/O DRAM is to be stacked on the logic die (SoC) of the mobile device. If we are considering a single layer of wide I/O memory being placed on top of a complex SoC, then we do not need TSV. There are cheaper technologies than TSV, for example, bump based 3D stacking. Alternatively, one can have a feed-through interposer (FTI), between the logic and memory dice, as discussed in the SMAFTI technology developed at NEC.
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resistion
1/14/2011 3:19 AM EST
@Abhijit.Deb: Doesn't the interposer use TSV?
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IFTLE
1/15/2011 9:50 AM EST
This is very old news. Memory on logic as the driver for 3DIC has been proposed for years. At Semicon Taiwan this past Sept there were several talks on this including Nokia who stated that JEDEC wide I/O standardization for 3DIC will be ready in late 2011. Contrary to the comments of Mokhoff and others, both Elpida and Samsung had now announced stacked memory products for 2011/2012. 3D is fully underway. To keep up with this on a weekly basis link to: http://www.electroiq.com/index/packaging/packaging-blogs/ap-blog-display/blogs/ap-blog.html
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