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iniewski
To @CowboyCeltic and others who worked on these type materials: how low is ...
CowboyCeltic
I have been involved in this type of printable transistor research in the past ...
Bilayer gate solves plastic transistor woes
R Colin Johnson
2/1/2011 11:59 AM EST
PORTLAND, Ore.—Bilayer-gate insulators solve the problems associated with building plastic transistors on flexible organic substrates, according to Georgia Institute of Technology, which has developed a new method for stacking two gate dielectric materials that cancel out the drawbacks of each, resulting in relatively fast, stable plastic transistors with high current carrying capabilities.
The Georgia Tech researchers predict their transistors will be useful in applications such as smart bandages, RFID tags, plastic solar cells, light emitters for smart cards and other applications requiring flexible ultra-stable electronics.
Plastic transistors have long been sought to lower the cost of semiconductor manufacturing by allowing roll-to-roll presses to print organic materials of flexible substrates at room temperature and at normal atmospheric pressures, rather than require a vacuum and thousand degree temperatures like silicon chips. Unfortunately, the resulting performance of plastic transistors has been poor. Now the Georgia Tech researchers think they may have hit on a way to have the best of both worlds.
The key to success, according to professor Bernard Kippelen, director of Georgia Tech's Center for Organic Photonics and Electronics, was crafting a novel interface between two stacked gate dielectrics. The material consists of a fluorinated polymer using using C–C, C–F and C–O bonds called Cytop and a high-k metal-oxide laid down with atomic layer deposition.
"Rather than using a single dielectric material," said Kippelen. "We developed a bilayer gate dielectric." He performed the work with researchers Do Kyung Hwang, Canek Fuentes-Hernandez, Jungbae Kim, William Postcavage, and Sung-Jin Kim.
Georgia Tech expects future plastic transistors on flexible substrates to be enabled by a novel bilayer gate dielectric.
The Cytop layer forms with extremely few defects at the interface with the organic semiconductor, but has a low dielectric constant therefore requiring a high turn-on voltage for a plastic transistor. The high-k material has low-voltage electrical characteristics, but is leaky due to many defects at the interface. But by stacking the two materials, the team was able to have the best of both worlds.
"We have two different degradation mechanisms that happen at the same time, but the effects are such that they compensate for one another," said Kippelen.
The team has been cycling transistors made from the material over 20,000 times with no degradation is its low-voltage high-current carrying capability, compared to previous plastic formulations.
The team is currently transferring the material from its glass-substrate test-bed to a flexible polymer substrate manufactured below 150 degrees Celsius. If all goes well, the next step will be using ink-jet printing to perform the actual deposition. Funding for Georgia Tech project was provided by the Office of Naval Research, the National Science Foundation and Solvay SA.
The Georgia Tech researchers predict their transistors will be useful in applications such as smart bandages, RFID tags, plastic solar cells, light emitters for smart cards and other applications requiring flexible ultra-stable electronics.
Plastic transistors have long been sought to lower the cost of semiconductor manufacturing by allowing roll-to-roll presses to print organic materials of flexible substrates at room temperature and at normal atmospheric pressures, rather than require a vacuum and thousand degree temperatures like silicon chips. Unfortunately, the resulting performance of plastic transistors has been poor. Now the Georgia Tech researchers think they may have hit on a way to have the best of both worlds.
The key to success, according to professor Bernard Kippelen, director of Georgia Tech's Center for Organic Photonics and Electronics, was crafting a novel interface between two stacked gate dielectrics. The material consists of a fluorinated polymer using using C–C, C–F and C–O bonds called Cytop and a high-k metal-oxide laid down with atomic layer deposition.
"Rather than using a single dielectric material," said Kippelen. "We developed a bilayer gate dielectric." He performed the work with researchers Do Kyung Hwang, Canek Fuentes-Hernandez, Jungbae Kim, William Postcavage, and Sung-Jin Kim.
Georgia Tech expects future plastic transistors on flexible substrates to be enabled by a novel bilayer gate dielectric.
"We have two different degradation mechanisms that happen at the same time, but the effects are such that they compensate for one another," said Kippelen.
The team has been cycling transistors made from the material over 20,000 times with no degradation is its low-voltage high-current carrying capability, compared to previous plastic formulations.
The team is currently transferring the material from its glass-substrate test-bed to a flexible polymer substrate manufactured below 150 degrees Celsius. If all goes well, the next step will be using ink-jet printing to perform the actual deposition. Funding for Georgia Tech project was provided by the Office of Naval Research, the National Science Foundation and Solvay SA.
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selinz
2/1/2011 1:32 PM EST
Let's hope that they can give it a bit of shrink too!
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R_Colin_Johnson
2/1/2011 1:55 PM EST
Georgia Tech is concentrating on low-voltage operaton and longevity right now, but I am sure that shrinkage is also on their agenda of improvements.
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iniewski
2/1/2011 2:40 PM EST
I don't think they need to be so small, you are not going to make an ASIC or microprocessor out of them ;-)...they need decent performance though...dr Kris
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pixies
2/3/2011 1:52 PM EST
Yeah, I agree, the advantages for polymer based transistors are flexibility, transparency, low temperature processiblity, ink-jet printability, and so on, not the smallness.
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CowboyCeltic
2/23/2011 3:51 PM EST
I have been involved in this type of printable transistor research in the past and the big hurdle was always the electron mobility of the printable semiconductor materials.
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iniewski
2/23/2011 4:18 PM EST
To @CowboyCeltic and others who worked on these type materials: how low is electron mobility? is 10% of crystalline silicon achievable? Kris
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