Nanowires process arithmetic/logic
R Colin Johnson
2/11/2011 1:38 PM EST
PORTLAND, Ore.—Nanowire processors will pack more arithmetic and logic per square inch than conventional semiconductors, according to Harvard University researchers who recently demonstrated basic ALU functionality for silicon-germanium nanowire arrays in collaboration with Mitre Corp.
The Harvard- Mitre nanowire arrays were billed as the world’s first programmable nanoprocessor.
Produced by the laboratory of Charles Liber—an admirer of the legendary Richard Feynman—the ultra-tiny nanocircuits were composed of 30 nanometer thick, oxide-insulated wires, which were constructed into hierarchically arranged tile-like patterns that can be scaled for any sized problem. The crossbar wire arrays performed both operations and memory functions, since the state of nanowire field-effect transistors (FETs) was nonvolatile.
Lieber claimed that the nanoewire processing functions also consumed less power than conventional circuits, which must constantly be powered to retain memory functions. Next, the researchers hope to demonstrate the kind of control functions needed to organize the nanoprocessors into an architecture to enable smart sensors and consumer electronic devices to be fabricated with silicon-germanium nanowires.
Funding for the project was provided by a faculty fellowship from the U.S. Department of Defense National Security Science and Engineering, the NanoEnabled Technology Initiative and the Mitre Innovation Program.
Scanning electron microscopy image of a programmable nanowire nanoprocessor super-imposed on a schematic nanoprocessor circuit architecture.