News & Analysis
Comment
R_Colin_Johnson
Lieber's Harvard lab is dedicated to bottom-up synthesis, that is ...
R_Colin_Johnson
These devices are so small, that I believe reliability will be an ongoing issue ...
Nanowires process arithmetic/logic
R Colin Johnson
2/11/2011 1:38 PM EST
PORTLAND, Ore.—Nanowire processors will pack more arithmetic and logic per square inch than conventional semiconductors, according to Harvard University researchers who recently demonstrated basic ALU functionality for silicon-germanium nanowire arrays in collaboration with Mitre Corp.
The Harvard- Mitre nanowire arrays were billed as the world’s first programmable nanoprocessor.
Produced by the laboratory of Charles Liber—an admirer of the legendary Richard Feynman—the ultra-tiny nanocircuits were composed of 30 nanometer thick, oxide-insulated wires, which were constructed into hierarchically arranged tile-like patterns that can be scaled for any sized problem. The crossbar wire arrays performed both operations and memory functions, since the state of nanowire field-effect transistors (FETs) was nonvolatile.
Lieber claimed that the nanoewire processing functions also consumed less power than conventional circuits, which must constantly be powered to retain memory functions. Next, the researchers hope to demonstrate the kind of control functions needed to organize the nanoprocessors into an architecture to enable smart sensors and consumer electronic devices to be fabricated with silicon-germanium nanowires.
Funding for the project was provided by a faculty fellowship from the U.S. Department of Defense National Security Science and Engineering, the NanoEnabled Technology Initiative and the Mitre Innovation Program.

The Harvard- Mitre nanowire arrays were billed as the world’s first programmable nanoprocessor.
Produced by the laboratory of Charles Liber—an admirer of the legendary Richard Feynman—the ultra-tiny nanocircuits were composed of 30 nanometer thick, oxide-insulated wires, which were constructed into hierarchically arranged tile-like patterns that can be scaled for any sized problem. The crossbar wire arrays performed both operations and memory functions, since the state of nanowire field-effect transistors (FETs) was nonvolatile.
Lieber claimed that the nanoewire processing functions also consumed less power than conventional circuits, which must constantly be powered to retain memory functions. Next, the researchers hope to demonstrate the kind of control functions needed to organize the nanoprocessors into an architecture to enable smart sensors and consumer electronic devices to be fabricated with silicon-germanium nanowires.
Funding for the project was provided by a faculty fellowship from the U.S. Department of Defense National Security Science and Engineering, the NanoEnabled Technology Initiative and the Mitre Innovation Program.

Scanning electron microscopy image of a programmable nanowire nanoprocessor super-imposed on a schematic nanoprocessor circuit architecture.
Navigate to related information


Luis Sanchez
2/11/2011 5:14 PM EST
It's always interesting to read news about the emerging nanotechnology. I wonder who's more advanced? the universities and non-profit research centers or the private sector?
I wonder how's the technology passed from the schools to the private companies? Who will be the first to capitalize on this innovation?
By the way, I didn't see what kind of metal are the wires made of.
Sign in to Reply
R_Colin_Johnson
2/14/2011 8:03 PM EST
The nanowire material was silicon germanium.
Sign in to Reply
hm
2/11/2011 7:00 PM EST
What about reliability aspect? What will be operating temperature and other environmetal specifications? How about EMI/EMC and EMP?
Will they have typical life of 15 years or more?
Sign in to Reply
R_Colin_Johnson
2/14/2011 8:06 PM EST
These devices are so small, that I believe reliability will be an ongoing issue affecting not only the material formulation, but the architecture used--redundancy?
Sign in to Reply
pixies
2/14/2011 9:39 AM EST
It is a really interesting work. The article, however, did not explain how the nanowires were made. Were they synthesized first and then attached to the wafer or were they deposited as a film and then lithographically defined on the wafer? If latter, then this is simply the extension of the existing semiconductor manufacturing technology.
Sign in to Reply
R_Colin_Johnson
2/14/2011 8:11 PM EST
Lieber's Harvard lab is dedicated to bottom-up synthesis, that is self-assembling processes that achieve array densities beyond the reach of traditional lithography.
Sign in to Reply