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Mentor joins Leti's program on maskless lithography
Anne-Francoise Pele
3/1/2011 5:15 AM EST
PARIS – Mentor Graphics Corp. and CEA-Leti have signed an agreement for Mentor
Graphics to join IMAGINE, a CEA-Leti program focused on electron-beam
direct write lithography for IC manufacturing for 22-nm and beyond.
Intended to operate for three years, this program allows companies to assess a maskless lithography infrastructure for IC manufacturing and use Mapper's technology as a solution towards high throughput. It covers a global approach, including tool assessment, patterning and process integration, data handling, prototyping and cost analysis.
The purpose of the IMAGINE industrial program is to reach throughput of 10 wafers per hour per exposure module. As is, this rate would compete with other technologies on a wafers-per-square-meter basis and will offer a better solution in terms of modularity and power consumption, Leti indicated.
As part of the IMAGINE program, Mentor said it will develop multiple e-beam lithography data processing flows.
"Multi-beam systems for maskless lithography are contenders for next-generation patterning. The IMAGINE program is offering a unique infrastructure to enable this technology and we want to be an early partner in this research," stated Joseph Sawicki, vice president and general manager of Mentor’s Design to Silicon Division. "Our broad technology base and experience as the leader in optical proximity correction (OPC) and mask process correction (MPC) will provide technical components needed to make sure the data-path technology is ready for production deployment."
Mentor is the fifth industrial partner to join the IMAGINE program. Other partners include TSMC, Mapper, STMicroelectronics NV, Sokudo and TOK.
Intended to operate for three years, this program allows companies to assess a maskless lithography infrastructure for IC manufacturing and use Mapper's technology as a solution towards high throughput. It covers a global approach, including tool assessment, patterning and process integration, data handling, prototyping and cost analysis.
The purpose of the IMAGINE industrial program is to reach throughput of 10 wafers per hour per exposure module. As is, this rate would compete with other technologies on a wafers-per-square-meter basis and will offer a better solution in terms of modularity and power consumption, Leti indicated.
As part of the IMAGINE program, Mentor said it will develop multiple e-beam lithography data processing flows.
"Multi-beam systems for maskless lithography are contenders for next-generation patterning. The IMAGINE program is offering a unique infrastructure to enable this technology and we want to be an early partner in this research," stated Joseph Sawicki, vice president and general manager of Mentor’s Design to Silicon Division. "Our broad technology base and experience as the leader in optical proximity correction (OPC) and mask process correction (MPC) will provide technical components needed to make sure the data-path technology is ready for production deployment."
Mentor is the fifth industrial partner to join the IMAGINE program. Other partners include TSMC, Mapper, STMicroelectronics NV, Sokudo and TOK.
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