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resistion
I don't see the comments anymore in the tsmc 14 nm article. Group censor? :)
resistion
Interestingly, no 16 nm node anymore. It became 15 and now 14 nm. It might even ...
Globalfoundries, TSMC square off in litho
Mark Lapedus
3/1/2011 6:37 PM EST
Tuttle vs. rabbit
Like Globalfoundries, rival TSMC started its 193-nm immersion program at the 40-nm node and the foundry giant will extend that to its 28- and 20-nm processes. At 16-nm, the company is evaluating double-patterning, EUV and maskless.
Until recent times, TSMC was down on EUV, but it has since warmed up to EUV amid delays for the other NGL technologies. ''TSMC would like to use EUV or maskless at 16-nm,’’ depending on which technology is more ''feasible,’’ said Burn Lin, vice president of the Nano Patterning Division at TSMC.
The company does not plan to back both technologies. For some time, TSMC has backed maskless and invested in Mapper Lithography. Mapper has installed a 110-beam, 5-KeV maskless tool within TSMC and processed wafers down to 20-nm with the machine. That tool is an ''alpha’’ machine, but not a production-worthy model.
In a major change in strategy, TSMC recently ordered a pre-production EUV tool from ASML, which will be installed at the foundry giant in early 2011. ''EUV is better funded, but I worry about cost,’’ Lin told EE Times.
TSMC has also expressed concerns about the power source for EUV. Maskless also has some challenges, such as data volumes, throughput, among others. Sources believe Mapper may require another $300 million or so to develop a full-blown production machine.
Which technology will TSMC choose at 16-nm? That remains unclear. But if it’s based on resources given to a particular technology, EUV appears that it will prevail. ''It’s a game between the rabbit and turtle,’’ Lin said at a presentation. ‘’I assume the rich guy is the rabbit.’’
Like Globalfoundries, rival TSMC started its 193-nm immersion program at the 40-nm node and the foundry giant will extend that to its 28- and 20-nm processes. At 16-nm, the company is evaluating double-patterning, EUV and maskless.
Until recent times, TSMC was down on EUV, but it has since warmed up to EUV amid delays for the other NGL technologies. ''TSMC would like to use EUV or maskless at 16-nm,’’ depending on which technology is more ''feasible,’’ said Burn Lin, vice president of the Nano Patterning Division at TSMC.
The company does not plan to back both technologies. For some time, TSMC has backed maskless and invested in Mapper Lithography. Mapper has installed a 110-beam, 5-KeV maskless tool within TSMC and processed wafers down to 20-nm with the machine. That tool is an ''alpha’’ machine, but not a production-worthy model.
In a major change in strategy, TSMC recently ordered a pre-production EUV tool from ASML, which will be installed at the foundry giant in early 2011. ''EUV is better funded, but I worry about cost,’’ Lin told EE Times.
TSMC has also expressed concerns about the power source for EUV. Maskless also has some challenges, such as data volumes, throughput, among others. Sources believe Mapper may require another $300 million or so to develop a full-blown production machine.
Which technology will TSMC choose at 16-nm? That remains unclear. But if it’s based on resources given to a particular technology, EUV appears that it will prevail. ''It’s a game between the rabbit and turtle,’’ Lin said at a presentation. ‘’I assume the rich guy is the rabbit.’’
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Baolt
3/2/2011 10:55 AM EST
its all okey but what about intel & samsung. It seems intel is not willing to be involved in EUV since its fully applicable either samsung. If they drag to spend money on EUV who will finance technology then? It seems double patterning is the only feasible solution till we reach below 20nm.
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VincePG
3/10/2011 12:47 PM EST
If TSMC has decided to use EUV at 16nm that means it's been proven cost effective in high volume. The negative of this is, the other technologies have not been proven, at least to TSMC's satisfaction. TSMC really knows high volume and their opinion is the way to bet.
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resistion
4/30/2011 4:51 PM EDT
Interestingly, no 16 nm node anymore. It became 15 and now 14 nm. It might even become 13 nm by production time. 20 nm is already fixed to double patterning with 193 nm immersion. It could extend one more node. Multiple patterning should be mainstream in 2012.
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resistion
9/10/2011 2:10 AM EDT
I don't see the comments anymore in the tsmc 14 nm article. Group censor? :)
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