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sranje
kinnar
Great achievement by the Toyohashi University of Technology researchers, this ...
Researchers integrate silicon, III-V
R Colin Johnson
3/24/2011 5:40 PM EDT
PORTLAND, Ore.—Integrating gallium nitride emitters and other optical materials onto silicon substrates was recently demonstrated at the Toyohashi University of Technology. Researchers there claim to have solved the lattice mismatch problem between silicon and III-V materials, thereby enabling future integration of optics onto silicon chips.
Silicon photonics has been demonstrated for most optical functions, including waveguides, resonators and switches, but optical emitters has remained a task for III-V materials using gallium, arsenide, indium and their various nitrides.
Now, Akihiro Wakahara, the project team leader at Toyohashi Tech (Aichi, Japan) and colleagues claim to have invented a method of mitigating the lattice mismatch between silicon and III-V materials, thereby enabling optical emitters—including lasers—to be fabricated on silicon chips.
As a demonstration, Wakahara's team constructed a one-bit opto-electronic counter circuit that combines silicon field effect transistors (FETs) alongside gallium phosphide nitride (GaPN) LEDs on a single chip. The key to solving the lattice mismatch between silicon and III-V was accomplished by growing a thin gallium phosphide (GaP) layer using migration-enhanced epitaxy with III–V–N alloys. The resulting lattice matched Si/GaPN/Si hetero-structures were grown on silicon substrates using dual-chamber molecular beam epitaxy (MBE).
Silicon photonics has been demonstrated for most optical functions, including waveguides, resonators and switches, but optical emitters has remained a task for III-V materials using gallium, arsenide, indium and their various nitrides.
Now, Akihiro Wakahara, the project team leader at Toyohashi Tech (Aichi, Japan) and colleagues claim to have invented a method of mitigating the lattice mismatch between silicon and III-V materials, thereby enabling optical emitters—including lasers—to be fabricated on silicon chips.
As a demonstration, Wakahara's team constructed a one-bit opto-electronic counter circuit that combines silicon field effect transistors (FETs) alongside gallium phosphide nitride (GaPN) LEDs on a single chip. The key to solving the lattice mismatch between silicon and III-V was accomplished by growing a thin gallium phosphide (GaP) layer using migration-enhanced epitaxy with III–V–N alloys. The resulting lattice matched Si/GaPN/Si hetero-structures were grown on silicon substrates using dual-chamber molecular beam epitaxy (MBE).
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kinnar
3/25/2011 8:15 AM EDT
Great achievement by the Toyohashi University of Technology researchers, this has got the benefits as listed in the article but simultaneously one more advantage will be that the embedded circuits will be easily tested due to the on chip LEDs as an indicating elements.
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sranje
3/25/2011 9:53 AM EDT
There is another event - related to above.
Why is Power Integrations not announcing the Velox acquisition? PI now has a GaN-on-silicon fab facility.
Velox revenues were about $2.4M with 18 employees (most probably out of $$$).
It means that PI is very aggressive in investments for wide bandgap semiconductors (both SiC and GaN). STM has apparently made a pass on the fab and most probably acquired technology know-how for its internal developments.
GaN on silicon technology will likely change the landscape of Power Mngmt ICs - togheter with Digital power control it will allow major breakthroughs in power reduction and miniaturization.
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