Avoiding a startup graveyard
Silicon Valley is littered with failed startups from Ambric to Quicksilver who had visions of massively parallel processors running next-generation apps. The novel architectures often proved difficult to program, the next-gen apps failed to materialize and funding dried up.
Olofsson has studied their history and hopes to avoid their faults. Unlike the earlier startups, Adapteva is not trying to unseat existing dual- and quad core host processors, but open up new sockets for high end DSP arrays.
"What we think is missing is a general-purpose accelerator—not for baseband or graphics jobs that are being handled quite well--but for things like speech or face recognition or real-time imaging processing," Olofsson said.
He shakes off the notion that such apps for all practical purposes don't exist in today's smartphone market. "There's no such thing as too much performance, and ten years from now who knows what the smartphone will look like," he asks.
Silicon vendors might even be interested in Epiphany for its many-core architecture based on a mesh network of nodes, each with its own core and memory. The architecture uses a flat memory model where cores can run independently or address any other core's memory.
The approach means developers can program the chip in C with existing tools like the GNU GCC compiler. That was one of the attractions for BittWare that sold FPGA accelerator boards, but they could not be programmed in C.
Adapteva has a debugger, IDE front end and runtime libraries available with a developer's kit, but it has a few months of work ahead on higher level software support. For instance, it is developing a message passing framework based on a standard from the Multicore Association.
To keep his four-person company lean, Olofsson is reaching out to an unnamed software partner for help creating the higher level tools. The partner will be announced in about a month.
"A lot of people do it all themselves, and just like that they spend $75 million," he said.