Japanese EUV litho consortium goes global

LONDON – A Japanese joint venture formed to hasten the adoption of Extreme Ultra Violet (EUV) lithography has begun collaborating with foreign chip companies including Intel, Samsung, Hynix and Taiwan Semiconductor Manufacturing Co. Ltd.

The EUVL Infrastructure Development Center Inc. (EIDEC) was formed in January 2011 as joint venture between chipmakers Renesas and Toshiba and equipment and Japanese materials suppliers: Asahi Glass Co. Ltd., Dai Nippon Printing Co., Ltd., Fujifilm Corp., Hoya Corp., JSR Corp., Nissan Chemical Industries Ltd., Shin-Etsu Chemical Co. Ltd., Tokyo Ohka Kogyo Co. Ltd. and Toppan Printing Co. Ltd.

The group now has external collaboration with chipmakers: Hynix, Intel, Samsung and TSMC, according to its website. It is also working with Osaka and Hyogo universities and Ebara Corp., Lasertec Corp. and Japan's National Institute of Advanced Industrial Science and Technology.

The joint venture, a follow on from the MIRAI and Selete consortia, is aiming to remove some of the barriers to the use of EUV lithography on 16-nm and 11-nm high performance processes and to promote the introduction of EUV lithography by 2015. It has a working base at clean room in the National Institute of Advanced Industrial Science and Technology.

The four main work items: blank EUV mask inspection, patterned EUV mask inspection, EUV resist outgassing control, and EUV resist material research.

Intel is already manufacturing on a 22-nm process and TSMC on 28-nm using double-patterning and immersion of optical lithography. TSMC has installed an early EUV lithography machine supplied by ASML Holding NV. Intel has said that EUVL is already late for use in its own 10-nm production schedule for which the design-rules are already frozen.


Related links and articles:

www.eidec.co.jp

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