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double-o-nothing

12/28/2011 10:28 AM EST

If Hynix and now Samsung got the 15 nm QPT process going, they have to reduce ...

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xprmntl

9/29/2011 4:49 PM EDT

Hynix sponsored research on AgInSbTe ...

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IEDM: Hynix takes NAND to 15-nm

Peter Clarke

9/16/2011 11:24 AM EDT


LONDON – While many experts have expressed doubts about the ability of flash memory to scale and indicated the need for an alternative non-volatile memory technology, Hynix has just gone ahead and produced a 15-nm NAND flash memory cell which it plans to unveil at this year's International Electron Devices Meeting (IEDM).

However, at the same conference Hynix is due to report on an 84-nm pitch memory process for the production of 1-Gbit phase-change memories and beyond. As memory process are usually denoted by the half-pitch that is effectively a 42-nm process.

IEDM is due to take place December 5 to 7 in Washington DC and Hynix looks set to be a star of the conference, at least in terms of memory. Although the final program has not yet been posted, the organizers have tipped as highlights both the NAND flash and PCRAM papers that Hynix researchers are due to present. In the case of PCM whether this star status simply results from the likes of Samsung and Micron scaling back research waits on the release of the full program and the fullness of time.

Last year's IEDM saw the unveiling by Intel and Micron Technologies of the world's first NAND memory built using 25-nm design rules, which introduced the unusual technology of an air-gap to reduce word-line to word-line capacitance.

This year, Hynix Semiconductor researchers have demonstrated a NAND flash memory cell with a geometry somewhere in middle between 10- and 19-nm. At this level of miniaturization it becomes hard to measure the geometry and variability is high. According to the organizers the mid-1X-nm NAND flash memory has "excellent electrical characteristics and reliability" and the memory includes a word-line air-gap. What is not yet clear and will hopefully be included in the paper is the endurance cycling performance. As geometries decrease there is a tendency for NAND flash memory to show lower endurance significantly below the 10^6 cycles that were frequently specified at geometries above 100-nm.

Hynix is also due to present on a process technology for phase-change random access memory plus a 1-Gbit PCRAM implemented in the process. The technology is said to be highly scalable and low-cost, and was used to monolithically integrate a 1-Gbit PCRAM having 4F2 84-nm pitch memory cells occupying 0.007 square microns.

Surprisingly the memory technology is said to have 10-year data retention at temperatures above 200 degrees C. Such robust thermal stability has proved difficult for phase-change memory in the past but is critical for multilayer cell-stacking architectures.



Transmission electron microscope photographs showing cross-sections of phase-change memory cell in 42-nm process and the core/periphery areas.

Paper 3.3 is Highly Productive PCRAM Technology Platform and Full-Chip Operation Based on 4F2 (84-nm pitch) Cell Scheme for 1 Gb and Beyond, S. Lee et al, Hynix Semiconductor. Paper 9.1 is A Middle-1X-nm NAND Flash Memory Cell (M1X-NAND) with Highly Manufacturable Integration Technologies, J. Hwang et al., Hynix Semiconductor.




resistion

9/16/2011 1:00 PM EDT

Impressed by 15 nm, since this inaugurates multiple patterning. But I don't quite buy the PCRAM data retention claim.

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resistion

9/16/2011 6:42 PM EDT

Interestingly only one NAND cell is discussed not an array.

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double-o-nothing

9/27/2011 7:53 AM EDT

Indeed, Google "Hynix qspt"

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R G.Neale

9/17/2011 4:08 AM EDT

Resiston –Ahead of the IEDM 2011 paper your reservations re PCM elevated temperature data retention might find an answer in a recent patent application from Hynix (US2011/0193046A1). As well as the usual broad-brush material composition claims, one material composition is cited as of particular interest, AgLnSbTe.
That same patent also discloses a matrix isolation fabrication technique using an SOI structure, allowing two diodes in parallel to share the reset current and so alleviates the current density problem in the silicon. The need for this suggests the current density in the PCM cell remains high.
For me this raises the question as to the immunity of any new material from element separation associated with high current density and electrochemical effects. To be credible the claimed elevated temperature (200C for 10 Years) will need to be supported by solid evidence as a function of write/erase lifetime and in a fully processed device matrix.
The language of the abstracts “describe a complete technology platform” and data published to date suggests that this 1G-bit device may be relegated to demonstration status rather than announced as a commercial product; as the three 1G-bit PCMs (Numonyx/Micron/Samsung) that have gone before. IEDM 2011 and post-IEDM will be an interesting time for PCM followers.

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resistion

9/18/2011 9:29 AM EDT

Dr. Neale, thanks for the info. Many attempts to bring PCM retention to a higher level by using a material other than GST have fallen short. We also have to remember the high resistance state decreases resistance with temperature.

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rbtbob

9/18/2011 5:11 AM EDT

Regarding the Hynix patent app. The first AgLnSbTe is likely a typo. Paragrapgh 0036 under Detailed description reads AgInSbTe. You had me looking to see if there was an indication of which Lanthanide they were using. There is some research that suggests doping the chalcogenide with various of the Lanthanides will mitigate the problems with thermal stress and migration.

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R G.Neale

9/19/2011 5:06 AM EDT

Rbtbob –Agreed, Indium does appear later in the patent. I also have spent time researching the literature on lanthanides without finding any great enlightenment. The use of silver in AgInSbTe is interesting, in my experience silver always promoted permanent crystallization in chalcogenides either by alloying, or possibly catalysis. I am sure you will find there is more in the literature on AgInSbTe and GeInSbTe. I think what is important for any potential PCM material composition is to establish the crystallization surface temperature as an overlay on the phase diagram (no small task). The peaks and troughs in that surface will at least allow some of the thermal consequences of element separation to be determined. Even more important is the degree to which element separation might even be tolerated. From data in the literature I have constructed that surface for a section of one important PCM composition, and I was hoping to be able to publish that in the near future. The idea is not new, when I was at Harris Semiconductor we looked at the PCM threshold voltage surface as a function of composition hoping that we could find a region where a slope could be found that would balance out the effects of electro-migration (element separation). We assumed, wrongly, that the result of electro-migration would be layers of material of different composition, recently IBM have shown this to be wrong as I discussed in one of my PCM Progress Reports here in EETimes.

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rbtbob

9/19/2011 2:51 PM EDT

The following paper is the best I can get the Google to cough up. It has a graph that might be of interest:

http://www.ntmdt.com/data/media/files/publications/2006/02.16_s.a._kozyukhin_e.n._english.pdf

I believe there are much better papers in some of the material science publications, but the searches are best done using the specialized search engines of the paper houses from an institution with access rights. Maybe a university student will read this and do a search. I would think that Dr. Savransky could offer some insight on lanthanide doping, but he might not want to make any such disclosure.

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resistion

9/19/2011 9:43 PM EDT

These kinds of devices are interesting from academic viewpoint. But I don't know if any company would delve into such cocktails of exotic elements like As and Se.

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xprmntl

9/29/2011 4:36 PM EDT

There are quite a few companies that use As (arsenic) in semiconductor devices. Market research indicates that the GaAs market was projected at $5.2B for 2011, see: http://www.eetimes.com/electronics-news/4212649/Gallium-arsenide-on-a-roll--says-analyst

ZnSe is a common in blue and white light-emitting diodes and diode lasers.

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Semyon Savransky

9/21/2011 2:09 PM EDT

Hynix mentioned AgLnSbTe in the paragraph 0006 of patent 2011/0193046A1 and AgInSbTe in the paragraph 0036 of the same patent. Because the patent is rather about cell than about material I think AgLnSbTe is typo. AgInSbTe is well-known phase-change alloy (PCA) but it cannot provide 200oC retention for 10 Years as far as I know.

I do not recall any good PCA with rare-earth elements but my experience with such compositions are quite limited. The paper of good friend of my Sergey Kozyukhin cited in early comment is about basic properties. Chalcogenides with rare-earth elements are promising for optics but at least As2X3 (X = S, Se) with rare-earth elements studied in the paper would NOT make good PCM.

The best PCA I used to work with has about 150oC retention for 10 Years, about 5 orders magnitude difference between high and low resistances, drift about 4X smaller than GST and good immunity for read disturb.

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resistion

9/23/2011 7:03 PM EDT

Could Hynix be working on SiO2- doped GST?

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Semyon Savransky

9/21/2011 2:17 PM EDT

I don’t know how Hynix measure retention. PCM retention is a tricky issue – it is not enough conduct few experiments at elevated temperatures and then extrapolate your results to 10 years period.
It seems that Politecnico di Milano group started to recognize the problem, so read their papers.

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double-o-nothing

12/28/2011 10:28 AM EST

If Hynix and now Samsung got the 15 nm QPT process going, they have to reduce the cost of it by taking it to the low teens or even 10 nm.

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