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Free webinar: Implementing on-chip digital ADCs and DACs in FPGAs
Clive Maxfield
2/14/2012 6:02 AM EST
TITLE: On-chip Digital ADCs, DACs and Related Stellamar IP for Microsemi SoC Devices
WHAT: Microsemi will host a webinar featuring Stellamar to discuss the challenges of effectively integrating analog functions onto FPGAs. Stellamar creates and licenses IP that allows analog functions to be embedded in Microsemi FPGAs and cSoCs. Their IP portfolio and pipeline consists of all Digital ADC, DAC IP, DC-DC Controller IP and Clock Multiplier IP.
WHO: The webinar is designed for customers interested learning:
WHEN: Thursday, Feb. 16 , 2012 from 8-9 a.m. PST.
REGISTER: Click Here to register and reserve an attendee spot.
A recorded version of the webinar and all presentation materials will be available after the event.
If you found this article to be of interest, visit Programmable Logic Designline where you will find the latest and greatest design, technology, product, and news articles with regard to programmable logic devices of every flavor and size (FPGAs, CPLDs, CSSPs, PSoCs...).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for my weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
WHAT: Microsemi will host a webinar featuring Stellamar to discuss the challenges of effectively integrating analog functions onto FPGAs. Stellamar creates and licenses IP that allows analog functions to be embedded in Microsemi FPGAs and cSoCs. Their IP portfolio and pipeline consists of all Digital ADC, DAC IP, DC-DC Controller IP and Clock Multiplier IP.
WHO: The webinar is designed for customers interested learning:
- Previous techniques for interfacing FPGAs with ADCs
- How Analog Replacement IP can benefit your next design
- General IP performance ranges and applications
- General utilization numbers for Microsemi FPGAs
- Current Implementation success stories
WHEN: Thursday, Feb. 16 , 2012 from 8-9 a.m. PST.
REGISTER: Click Here to register and reserve an attendee spot.
A recorded version of the webinar and all presentation materials will be available after the event.
If you found this article to be of interest, visit Programmable Logic Designline where you will find the latest and greatest design, technology, product, and news articles with regard to programmable logic devices of every flavor and size (FPGAs, CPLDs, CSSPs, PSoCs...).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for my weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
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