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BobsUrUncle
The local memory is too small and there is no DMA or cache controller. All data ...
rhfish
Andreas is a design god. Epiphany is the stripped down Deuce Coupe whipping the ...
Adapteva close to sampling 28-nm, 64-core coprocessor
Peter Clarke
3/18/2012 7:54 AM EDT
HPC traction
The design taped out in August and chips are back from fab, said Olofsson, but they still need to packaged and tested. All being well the company will meet its goal of sampling chips to customers in the first quarter of 2012, he said.
Adapteva claims that CoreMark benchmarking data shows that the previously released Epiphany-III chip performs similarly to server processors, such as Intel Xeon chips, while consuming less than 2 watts of peak power. The Epiphany-IV chip will offer a fourfold performance improvement on CoreMark benchmarks at the same 2 watt power consumption
"Adapteva’s low-power, high-performance approach will transform the mobile markets by enabling server-level computing local to portable devices such as smartphones and tablets," the company claimed when it announced the E64G4 chip.
The Epiphany architecture can be programmed entirely in C/C++ and allows multiple programs to run at the same time. One of the main architectural innovations from Adapteva is a low-power patented network-on-chip architecture that, in the 64-core device, sustains 25-Gbytes per second local memory bandwidth and 6.4-Gbytes per processor network bandwidth.
Applications include machine vision, speech recognition, software defined radio, radar, security and medical diagnostics. Olofson said the company would be looking to produce additional specialized versions of the 64-core device in the following quarters.
When asked what sort of additions Olofsson said: "We're getting quite a lot of traction in the HPC [high-performance computing] community. So it could be things like a double-precision floating point array with additional memory."
Related links and articles:
www.adapteva.com
News articles:
Wall Street shopping for fast FPGAs
Debunking the myth of the $100 million ASIC
Adapteva gets multi-core programming boost
Startup aims many-core chip at smartphones
From RTL to GDSII in just six weeks
The design taped out in August and chips are back from fab, said Olofsson, but they still need to packaged and tested. All being well the company will meet its goal of sampling chips to customers in the first quarter of 2012, he said.
Adapteva claims that CoreMark benchmarking data shows that the previously released Epiphany-III chip performs similarly to server processors, such as Intel Xeon chips, while consuming less than 2 watts of peak power. The Epiphany-IV chip will offer a fourfold performance improvement on CoreMark benchmarks at the same 2 watt power consumption
"Adapteva’s low-power, high-performance approach will transform the mobile markets by enabling server-level computing local to portable devices such as smartphones and tablets," the company claimed when it announced the E64G4 chip.
The Epiphany architecture can be programmed entirely in C/C++ and allows multiple programs to run at the same time. One of the main architectural innovations from Adapteva is a low-power patented network-on-chip architecture that, in the 64-core device, sustains 25-Gbytes per second local memory bandwidth and 6.4-Gbytes per processor network bandwidth.
Applications include machine vision, speech recognition, software defined radio, radar, security and medical diagnostics. Olofson said the company would be looking to produce additional specialized versions of the 64-core device in the following quarters.
When asked what sort of additions Olofsson said: "We're getting quite a lot of traction in the HPC [high-performance computing] community. So it could be things like a double-precision floating point array with additional memory."
Related links and articles:
www.adapteva.com
News articles:
Wall Street shopping for fast FPGAs
Debunking the myth of the $100 million ASIC
Adapteva gets multi-core programming boost
Startup aims many-core chip at smartphones
From RTL to GDSII in just six weeks
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dblaza1
3/19/2012 6:52 PM EDT
Would love to see an affordable dev kit for this product out in the world (sub $500)
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rhfish
3/21/2012 4:36 PM EDT
Andreas is a design god. Epiphany is the stripped down Deuce Coupe whipping the the rich kid's Corvette.
The clock propagation scheme is particularly innovative.
Protein folding and synthetic biology guys will shower him with money.
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BobsUrUncle
3/21/2012 5:40 PM EDT
The local memory is too small and there is no DMA or cache controller. All data movement has to programmed in the code.
Sorry, love underdogs, but a better architecture is needed to make the chip useful. Team up with one of the better researchers in the field of many core processors and improve the product.
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