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vediappan

12/21/2012 7:49 AM EST

Automotive microcontrollers are just as safety conscious as the Space Shuttle, ...

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R_Colin_Johnson

4/25/2012 12:39 PM EDT

The redundant core is performing every operation that the main core performs, ...

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Freescale ups ante with quad-core Qorivva

R Colin Johnson

4/24/2012 2:16 PM EDT

PORTLAND, Ore.—Boosting the performance of its automotive microcontrollers—without increasing power consumption—is the aim of the new quad-core processor announced Tuesday (April 24)  by Freescale Semiconductor Inc. at the 2012 Society of Automobile Engineers World Congress in Detroit.

"This is our first quad-core automotive microcontroller, which boosts performance to support auto-coding, signal filtering and other processor intensive operations in modern automobiles," said Tony Veri, product marketing manager for Freescale's automotive powertrain microcontrollers. "But we were able to do it within the power envelope of our existing single core microcontrollers."

The new Qorivva MPC5746M microcontroller provides a two-to-five times performance boost over previous 150MHz and 264MHz single-core devices with same power consumption, according to Freescale. It uses two Power Architecture e200 cores to handle engine control and gear-shift sequencing and a third identical core to offload peripheral functions. An integrated digital-signal-processor (DSP) is also on-chip to assist in the input/output tasks of the third peripheral-function core.

The fourth core, identical except without its own memory complement, serves as a "checker" core that does lock-step redundant checking one clock behind the main cores, working with a fault collection and correction unit to ensure safety even in the presence of errors. The new Qorivva microcontroller enables the highest safety level of ISO 26262 simplifying the designers system compliance with the most stringent automotive safety standards regulators specify today, according to Freescale.

The new quad-core Qorivva microcontroller also includes on-chip special-purpose logic that eliminates the need for off-chip application specific integrated circuits (ASICs), prevents hacking with tamper detection circuitry for both security and for performance enhancements that defeat emission controls to increase performance. A customer-programmable hardware security module using a fifth mini-core provides an integrated cryptographic module. Flash censorship functions also defeat hackers from guessing stored passwords and a secure boot mode ensures code has not been altered off-line.

Freescale also provides an enhanced calibration development system—called eCal—that allows for development and calibration using same hardware by virtue of a special flip-chip piggyback module.


Quad-core Qorivva MPC5746M microcontroller features a redundant checker-core (brown at top) which performs critical calculations one-step behind main core to ensure errors are caught and corrected (click on image to enlarge).




R_Colin_Johnson

4/24/2012 7:00 PM EDT

Automotive microcontrollers are just as safety conscious as the Space Shuttle, since human lives are at risk, which is why Freescale adopted a similar strategy to have a completely redundant core whose results are compared with the main core at each time step, allowing errors to be corrected before they cause loss of life.

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Neo1

4/24/2012 11:02 PM EDT

So in effect the performance is still low enough for every computation to be done by a single core. Or is it just doing the data correction for memory to peripheral transactions?

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R_Colin_Johnson

4/25/2012 12:39 PM EDT

The redundant core is performing every operation that the main core performs, just one clock step behind, which is then compared with a special error detection and correction unit. If the error can be corrected, it is, if it cannot, then the whole system goes into "limp home" mode, where the driver is instructed to take the car in for maintenance ASAP.

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vediappan

12/21/2012 7:49 AM EST

Automotive microcontrollers are just as safety conscious as the Space Shuttle, since human lives are at risk, which is why Freescale adopted a similar strategy to have a completely redundant core whose results are compared with the main core at each time step, allowing errors to be corrected before they cause loss of life.

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