3-D ICs coming in 2014
Separately, executives said several types of 3-D ICs using through-silicon vias (TSVs) will be in production in 2014.
“This is a game changer,” said Mark Brillhart, a packaging expert and vice president of technology and quality at Cisco Systems, moderating a panel here. “I think 3-D ICs will be a differentiator and they will proliferate into a lot of applications,” he said.
“I never thought packaging would be exciting again, but it’s like 1996 with flip chip all over again,” Brillhart said.
Qualcomm is “very happy with” dense 2.5-D Xilinx FPGAs “we are playing with in the lab” for product prototyping, said Nick Yu, vice president of engineering at Qualcomm. He predicted mobile applications processors for high-end smartphones will hit the market this year or next using TSVs to link to Wide I/O memories.
“This 3-D technology is really powerful and we will see it in many places,” said Iyer of IBM which has already made working prototypes of server processors in TSV stacks with DRAMs.
CPUs have 8-12 cores now “and want to go to 24 cores” with 3-D IC modules that stack DRAMs and heat sinks. IBM is also interested in “systems on an interposer,” 2.5-D modules that surround a processor with memory chips on a silicon substrate with de-coupling capacitors to improve power regulation, he said.
“There’s a lot of good stuff happening in this area that will make a significant difference, and the same concepts are applicable in the mobile space with similar advantages,” he added.
The 3-D ICs also pose plenty of unsolved problems. They generate heat that engineers still don’t know how to dissipate, they require new test strategies and manufacturing tools and they require designers form new kinds of supply chains that collaborate on deeply detailed technical and business levels.
“Cost is biggest issue of 3-D ICs right now,” said Yu of Qualcomm.
He said he is not convinced TSMC’s proposed end-to-end 3-D service will be the lowest cost offering it promises. Different supply chains will be required for different 3-D products, he added.
“Equipment costs are a big factor in our unit costs,” said Rich Rice, senior vice president of engineering and sales at ASE Group which is installing bonding/de-bonding, wafer thinning and other systems to handle the so-called middle steps of the 3-D process. “Even on the more traditional back-end we have a stiff cap ex burden when we start to ramp this capability up,” Rice said.
A spokesman for Applied Materials noted the need for new 3-D systems comes while capital equipment makers are also trying to prepare systems for 450 mm wafers and the 20 and 14 nm nodes.
Cisco’s Brillhart said he is concerned the many sometimes competing companies that need to come together to enable 3-D ICs find profitable ways to collaborate. “I’ve worked on too many programs where one of the partners in the supply chain became unprofitable and the technology went away,” he said.