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dylan.mcgrath
Seems as though Wijburg is getting the lion's share of the credit for ...
London Calling: Former IBM, Globalfoundries execs rising
Peter Clarke
8/7/2012 6:30 PM EDT
Coventor names semiconductor process expert as CTO
David Fried, a chip industry veteran with experience in process technology including SOI and FinFETs, has been appointed chief technology officer at MEMS design software vendor Coventor Inc. (Cary, NC). Fried has been appointed to led development efforts for fabrication at 22-nm and beyond.
Fried is chartered with overseeing the company's strategy and implementation of its virtual fab 3-D process modeling software called SEMulator3D.
Unlike Technical CAD (TCAD) software SEMulator3D is able model the complete front-end fabrication processes, the company claims. The fabrication modeling is the reason that Fried's 14 years experience at IBM working on silicon-on-insulator, FinFETs, strained silicon, memory scaling and process variability are highly valued at Coventor.
Fried's most recent position was as chief technologist for 22-nm at IBM Systems and Technology Group.
"David is one of the foremost authorities on leading-edge process development and understands deeply how advanced modeling and automation technology can be used to further evolve semiconductor manufacturing," said Mike Jamiolkowski, president and CEO of Coventor, in a statement. "With the continued move to new topologies and more exotic materials and techniques for enabling the scaling of process geometries our SEMulator3D solution is well-positioned to address large market opportunities. We are pleased to have such an expert leading our efforts in this area."
"As a user of SEMulator3D for many years, I can attest to its capabilities as a platform for advancing semiconductor process development," said Fried.
SEMulator3D is now being applied to accelerate development of the upcoming 14-nm and 10-nm manufacturing process nodes. SEMulator3D is also used by leading MEMS integrated device manufacturers and MEMS foundries for process development and design verification prior to tape out.
Related links and articles:
Dresden fab could host 20-nm process, 450-mm wafers
Panel reveals concerns over 450-mm wafers
EDA tool aims at 10-nanometer 3-D
London Calling: Wind River, Marconi and Mars
London Calling: Mirror, mirror on the EUV machine
David Fried, a chip industry veteran with experience in process technology including SOI and FinFETs, has been appointed chief technology officer at MEMS design software vendor Coventor Inc. (Cary, NC). Fried has been appointed to led development efforts for fabrication at 22-nm and beyond.
Fried is chartered with overseeing the company's strategy and implementation of its virtual fab 3-D process modeling software called SEMulator3D.
Unlike Technical CAD (TCAD) software SEMulator3D is able model the complete front-end fabrication processes, the company claims. The fabrication modeling is the reason that Fried's 14 years experience at IBM working on silicon-on-insulator, FinFETs, strained silicon, memory scaling and process variability are highly valued at Coventor.
Fried's most recent position was as chief technologist for 22-nm at IBM Systems and Technology Group.
"David is one of the foremost authorities on leading-edge process development and understands deeply how advanced modeling and automation technology can be used to further evolve semiconductor manufacturing," said Mike Jamiolkowski, president and CEO of Coventor, in a statement. "With the continued move to new topologies and more exotic materials and techniques for enabling the scaling of process geometries our SEMulator3D solution is well-positioned to address large market opportunities. We are pleased to have such an expert leading our efforts in this area."
"As a user of SEMulator3D for many years, I can attest to its capabilities as a platform for advancing semiconductor process development," said Fried.
SEMulator3D is now being applied to accelerate development of the upcoming 14-nm and 10-nm manufacturing process nodes. SEMulator3D is also used by leading MEMS integrated device manufacturers and MEMS foundries for process development and design verification prior to tape out.
Related links and articles:
Dresden fab could host 20-nm process, 450-mm wafers
Panel reveals concerns over 450-mm wafers
EDA tool aims at 10-nanometer 3-D
London Calling: Wind River, Marconi and Mars
London Calling: Mirror, mirror on the EUV machine
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dylan.mcgrath
8/8/2012 1:09 AM EDT
Seems as though Wijburg is getting the lion's share of the credit for Globalfoundries' yield improvements. More power to him.
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