AMD reports progress in cores, SoCs, APIs

CUPERTINO, Calif. – Advanced Micro Devices is making steady progress toward its goal of transforming itself into a system-on-chip company with broad industry backing for its chips.

AMD expects to announce soon new members of the Heterogeneous Systems Architecture group it launched earlier this year. HSA could finish “within months” the first draft of an applications programming interface for enabling merged graphics, x86 and other cores in SoCs.

“We are investing and trying to bring the industry with us to bring apps” to AMD and other SoCs, said Mark Papermaster, chief technology officer of AMD in a keynote at the Hot Chips conference here. “Without a common API and a path from high level languages [to hardware] you will not see broad adoption and new apps,” he told the annual gathering of several hundred processor designers.

“It’s not a pure speeds-and-feeds race--it hasn’t been for several years--it’s a solutionS problem,” Patermaster said. “It’s about accelerating the apps stack,” he said.

The pending API will help AMD deliver SoCs that support fast switching and a common memory pool among graphics and x86 cores. Such features could give it a leg up against archrival Intel which also makes processors with graphics, x86 and other cores.

Papermaster declined to comment on whether AMD plans to make any ARM-based SoCs for smartphones, servers or embedded systems. ARM is a part of HSA, and AMD has said it will put an ARM Cortex A5 core in an SoC next year to enable security based on ARM’s Trustzone technology.

With the HSA group, AMD and ARM have formed an open alliance to attack their mutual competitor, Intel. Nvidia also is a rival to AMD, thus not a likely HSA member even though it is a key customer for ARM.

AMD will “seed the industry with a compiler” for the coming API, Papermaster said in an interview with EE Times after his talk, declining to give more details. Separately, AMD is expected to rally partners around its so-called Freedom Fabric based on the technology it acquired with SeaMicro earlier this year.

Freedon Fabric is essentially the follow on to the HyperTransport interface AMD helped define and create as an open standard. So far, AMD is keeping close to its chest details of the SeaMicro technology. The new interconnect “will be a tremendous game changer” because it has significant system-level features, said Papermaster, pictured below.


The RapidIO Trade Association is lobbying ARM and its SoC partners to adopt its technology as a standard interconnect. AMD believes the SeaMicro technology includes a broader set of technologies than RapidIO including storage and I/O virtualization capabilities.

AMD will ship an Opteron server card using the SeaMicro technology later this year. Next year it plans to use the technology with a low power server chip, but it has not said if that will be a card or an integrated chip.

Meanwhile, AMD is enhancing its EDA flows and design methodologies to support its SoC work.

For example, the company has a “high-density [circuit] library we are rolling out across our designs,” he said. “Using this with automated place-and-route routines, we are getting up to 30 percent die and power savings at the chip level--that’s like a process technology node’s level of efficiency,” he said.

Separately, Papermaster provided a few details about enhancements planned for AMD’s new high-end core called Steamroller. The core will provide a 30 percent improvement in operations per cycle. Its design is now complete and it will ship in chips and systems in 2013, he said