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PV-Geek
Neal is proabably right about the continuation of Moore's law for scaling for ...
Intel's Bohr sees at least 10 more years of scaling
Dylan McGrath
9/13/2012 12:53 AM EDT
SAN FRANCISCO—Despite the naysayers continually predicting an end to Moore's Law,Intel Senior Fellow Mark Bohr doesn't envision an end to semiconductor CMOS scaling for at least a decade.
Some believe that the end of the vaunted Moore's Law and CMOS scaling as we know it is near. Challenges to continued scaling include mounting technical hurdles and rising manufacturing costs.
But at the Intel Developer Forum here Wednesday (Sept. 12), Bohr, Intel's process technology guru, made it clear he seems a clear path to continued scaling into the 2020s.
"I don't see the end of Moore's Law for at least 10 years," Bohr said. He added that he believes Intel will continue to employ its "tick tock" model—where the company introduces a new architecture one year and follows with a move to a new process node the next—for the foreseeable future.
Responding to an audience question during a Q&A with a group of Intel Fellows at IDF, Bohr said he doesn't accept the conventional wisdom that CMOS scaling must eventually hit a wall. But he added that scaling probably will run out of steam at some point.
Responding to another question at the same Q+A, Bohr said Intel is studying ways to implement 3-D chip stacking in package, but sounded skeptical about the chances of the firm implementing it. "Having the technology and having a cost effective solution are two different things," Bohr said. "We can do 3-D chip stacking, but I think the added cost is still a bottleneck."
Bohr added that multi-chip packages—were two or more die are placed side-by-side in one package—and package-on-package technologies are already in wide use and appear to be far more cost effective than 3-D chip stacking.
"The problem with 3-D stacking is that it may be a viable solution for a 1 watt product, but it's not an acceptable solution for a 30- or 40- watt product because you can't dissipate all of that heat out of the package," Bohr said.
Also Tuesday, in an IDF keynote, Bohr said Intel has found a way to create a 10-nm process technology using immersion lithography and said the company is on track to start making 14-nm chips before the end of next year.
Related stories:
Some believe that the end of the vaunted Moore's Law and CMOS scaling as we know it is near. Challenges to continued scaling include mounting technical hurdles and rising manufacturing costs.
But at the Intel Developer Forum here Wednesday (Sept. 12), Bohr, Intel's process technology guru, made it clear he seems a clear path to continued scaling into the 2020s.
"I don't see the end of Moore's Law for at least 10 years," Bohr said. He added that he believes Intel will continue to employ its "tick tock" model—where the company introduces a new architecture one year and follows with a move to a new process node the next—for the foreseeable future.
Responding to an audience question during a Q&A with a group of Intel Fellows at IDF, Bohr said he doesn't accept the conventional wisdom that CMOS scaling must eventually hit a wall. But he added that scaling probably will run out of steam at some point. Responding to another question at the same Q+A, Bohr said Intel is studying ways to implement 3-D chip stacking in package, but sounded skeptical about the chances of the firm implementing it. "Having the technology and having a cost effective solution are two different things," Bohr said. "We can do 3-D chip stacking, but I think the added cost is still a bottleneck."
Bohr added that multi-chip packages—were two or more die are placed side-by-side in one package—and package-on-package technologies are already in wide use and appear to be far more cost effective than 3-D chip stacking.
"The problem with 3-D stacking is that it may be a viable solution for a 1 watt product, but it's not an acceptable solution for a 30- or 40- watt product because you can't dissipate all of that heat out of the package," Bohr said.
Also Tuesday, in an IDF keynote, Bohr said Intel has found a way to create a 10-nm process technology using immersion lithography and said the company is on track to start making 14-nm chips before the end of next year.
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PV-Geek
9/13/2012 5:44 PM EDT
Neal is proabably right about the continuation of Moore's law for scaling for the next 10 years, but there are at least two other Moore's law trends that we can expect over those same 10 years. First the cost of these processes will continue to rise by Moore's law. Second, the number of players that can afford it and have a high enough volume of chips to justify it will probably decrease by Moore's law.
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