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Adapting IP strategy is really tough. However as we know the demand are so high ...
Achronix 6 billion transistor FPGAs: Take two
Junko Yoshida
12/4/2012 10:45 AM EST
Just enough FPGAs in SoCs
Others in the industry may still regard Achrnoix' entry in the embedded FPGA IP business as a bit of a distraction for the start-up.
There has long been pent-up demand for FPGAs among volume consumer SoC companies making handsets or tablets, Holt argued. Look no further than Altera's family of low-cost, low-power FPGAs for the consumer market. Another example is SiliconBlue Technologies, which was acquired by Lattice Semiconductor, which targeted its low-end FPGAs for consumer electronics devices such as smartphones and media tablets.
The difference here is that Achronix plans to license FPGA fabric as IP so that consumer chip companies can use “just enough FPGAs” in their SoCs, Holt explained.
The reason consumer electronics chip companies are clamoring for FPGA solutions is "risk mitigation,” said Holt. “Programmability can limit the number of tape-outs.” As the consumer SoC’s die gets larger, it’s helpful to use part of the die for programmability.
Add to that, standards are constantly evolving for consumer products. “There are things that hardwired SoCs just can’t do,” Holt noted.
Moreover, FPGAs excel at doing complex logic very fast. “FPGAs are good at flexible acceleration of certain functions” on SoCs, explained Holt.
Achronix plans to announce its first embedded FPGA IP licensee in the first quarter of 2013.
Pointing out that the design cost for 22-/20-nm chips could range from $20 million to $50 million, according to recent cost estimates by Cadence, Holt said SoC companies would have to sell as many as 60 million to 100 million units to break even. Minimizing the number of tape-outs becomes extremely important for SoC cost savings, he added.
Still, as long as there are SoC vendors looking to use FPGA fabric in a portion of their SoCs, IP seems like good business for Achronix. The company believes it can leverage the technology it has already developed.
Holt said Intel's "one-stop shop" is a huge advantage when compared to working with other foundries that may require a fabless chip company to work with many partners. More important, being an Intel customer confers credibility and quality assurance, especially among global supply managers. “Sure, we may be paying extra for wafer cost," Holt said. "But think about the high yield rate Intel brings. This is paying off for us.”
Holt said Achronix is still planning to go public in 2014, but “it’s not like my ego is tied to the IPO.” The first thing Achronix must do is “become a profitable company within the 12 to18 months” after it starts sampling new FPGAs.
Related stories:
Others in the industry may still regard Achrnoix' entry in the embedded FPGA IP business as a bit of a distraction for the start-up.
There has long been pent-up demand for FPGAs among volume consumer SoC companies making handsets or tablets, Holt argued. Look no further than Altera's family of low-cost, low-power FPGAs for the consumer market. Another example is SiliconBlue Technologies, which was acquired by Lattice Semiconductor, which targeted its low-end FPGAs for consumer electronics devices such as smartphones and media tablets.
The difference here is that Achronix plans to license FPGA fabric as IP so that consumer chip companies can use “just enough FPGAs” in their SoCs, Holt explained.
The reason consumer electronics chip companies are clamoring for FPGA solutions is "risk mitigation,” said Holt. “Programmability can limit the number of tape-outs.” As the consumer SoC’s die gets larger, it’s helpful to use part of the die for programmability.
Add to that, standards are constantly evolving for consumer products. “There are things that hardwired SoCs just can’t do,” Holt noted.
Moreover, FPGAs excel at doing complex logic very fast. “FPGAs are good at flexible acceleration of certain functions” on SoCs, explained Holt.
Achronix plans to announce its first embedded FPGA IP licensee in the first quarter of 2013.
Pointing out that the design cost for 22-/20-nm chips could range from $20 million to $50 million, according to recent cost estimates by Cadence, Holt said SoC companies would have to sell as many as 60 million to 100 million units to break even. Minimizing the number of tape-outs becomes extremely important for SoC cost savings, he added.
Still, as long as there are SoC vendors looking to use FPGA fabric in a portion of their SoCs, IP seems like good business for Achronix. The company believes it can leverage the technology it has already developed.
Holt said Intel's "one-stop shop" is a huge advantage when compared to working with other foundries that may require a fabless chip company to work with many partners. More important, being an Intel customer confers credibility and quality assurance, especially among global supply managers. “Sure, we may be paying extra for wafer cost," Holt said. "But think about the high yield rate Intel brings. This is paying off for us.”
Holt said Achronix is still planning to go public in 2014, but “it’s not like my ego is tied to the IPO.” The first thing Achronix must do is “become a profitable company within the 12 to18 months” after it starts sampling new FPGAs.
Related stories:
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iniewski
12/4/2012 11:52 AM EST
Going to the IP model is risky as you say Junko as that stretches your revenue stream significantly out...but if it doesn't kill you you will leave longer! Kris
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me
12/4/2012 12:18 PM EST
No demand for the physical chip?
Who want the IP, Intel?
Is Tabula's chip out yet?
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junko.yoshida
12/4/2012 12:37 PM EST
Good questions. At this point, Achronix is not naming names in terms of its potential customers or potential licensees.
But there appear to be demands for their physical chip. Who would be the first embedded FPGA IP licensee would be an interesting story to follow.
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Brian Fuller2
12/4/2012 12:50 PM EST
The IP strategy will be a tough, tough row to hoe... But remember, they're pretty much attached to Intel's hip and that's probably, long term, where the ip makes sense... especially as guys like Mark Bohr are saying the fabless model is dead.
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me
12/4/2012 1:20 PM EST
If intel can turn out 5nm FPGA fabric in huge quantities, there may not be a need for foundries.
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resistion
12/5/2012 12:21 AM EST
It may moot since IP will be more limited at smaller nodes.
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kjdsfkjdshfkdshfvc
12/5/2012 10:20 AM EST
how so resistion, perhaps i don't understand your meaning/reasoning there ?
lets say you have a given IP (Intellectual Property) for a generic SIMD engine with the same throughput as Neon, then as the node shrink's you can fit more interconnected engines together, and so less limited not more.
you may want to give better discount's per cluster of SIMD engine as it shrinks to make your version more popular than the competitors in the global markets rather than the old school fixed pricing etc.
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resistion
12/5/2012 10:46 AM EST
Yes that's true by old school thought, but actually 28 nm and below, there are substantial material changes on all critical layers, plus litho constraints, you can't just work with any drawing you have.
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fundamentals
12/5/2012 11:42 AM EST
The last succesful FPGA start-up company was Actel, who shipped their first product in 1988. You could say "it's been a while since then". Indeed, but not for lack of trying. More than 25 start-ups have tried and failed. Most failed by the nature of their FPGAs, and a few failed by the market barriers erected by the four FPGA vendors. You cannot make a business out of FPGAs by making a new FPGA that is slightly faster or slightly cheaper than what is out there. To succeed you must double the FPGA performance or cut the price-per-LUT by half. Acronix long ago claimed to have done the first of these, but they could not deliver on that promise, even with Intel's fanciest process. So they change the business model to survive for a little while longer. Everybody comments on how tough the IP business is, but the FPGA business is much tougher. Their new tack is an acknowledgement of this fact.
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Roba66
12/5/2012 1:31 PM EST
The devices announced by Archronix are designed for backend fabric, they are loaded with serdes. It seems odd that Holt is talking about mobile applications: power management is very weak in FPGAs, maybe they have a different kind of configurability in mind, to knit together some Intel IP.
I have not seen anything about design software yet from this company, which is normally a big concern for FPGAs. It makes me think Intel may have more of a hand in the overall enterprise here than is evident at this point.
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jg_
12/6/2012 5:16 PM EST
I think the 'mobile applications' has an inferred 'Mobile infrastructure applications' - and certainly those base stations care far less about power, than throughput and flexibility.
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resistion
12/5/2012 11:57 PM EST
The next question is how far can they get without interposer?
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song-chou-1
12/6/2012 11:13 AM EST
We hear even with Intel matching TSMC with die-pricing (a loss leader for Intel), Achronix 22nm part is not competitive (power and leakage) with other FPGA.
why part not sampling
why Achronix needs to change business model
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Kevin N
12/6/2012 11:27 PM EST
So what's the story with these FPGAs? Are they really clockless, as the name states, or did they abandon that scheme?
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Kevin N
12/7/2012 12:36 AM EST
These small FPGA companies need some good 3rd-party tools. They can hand off the synthesis to Synplify, but somebody needs to make some 3rd-party place & route tool that can service all these little FPGA companies. Surely 80% of the work is common to different architectures.
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betajet
12/7/2012 3:09 PM EST
IMO what FPGA vendors need (and what they've always needed) is to open up their architectures and bit stream formats so that FLOSS software developers can take a crack at it. There are myriad applications for FPGAs that aren't progressing well because it's too cumbersome to use the vendors' tools. These include reconfigurable computing and specialized high-performance parallel architecture. It's just too hard to make progress in these areas with vendor tools so the people working in those areas simply do it in other ways, causing FPGA vendors to miss out on a lot of opportunity and miss out on the savings of letting others write their tools.
JMO/YMMV
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epa0723
1/29/2013 9:04 PM EST
Adapting IP strategy is really tough. However as we know the demand are so high and it boost up the marketplace. - [url=http://o2media.us/contact-o2-media/]O2 Media[/url]
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epa0723
1/29/2013 9:11 PM EST
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