CMOS on plastic
IBM researchers will demonstrate high-performance state-of-the-art
CMOS circuits —including SRAM memory and ring oscillators—on a
flexible plastic substrate. IBM built extremely thin silicon on
insulator (ETSOI) devices with a body thickness of just 60
angstroms. They used controlled spalling, a simple, low-cost
room-temperature process, which flakes off the silicon
substrate. The devices with gate lengths of <30 nm and a gate
pitch of 100 nm were transferred to a flexible plastic tape. The
ring oscillators had a stage delay of 16 ps at 0.9 V, believed to be
the best reported performance for a flexible circuit, according to
the researchers. A slight degradation of delay for the flexible
sample after the layer transfer comes from degradation of p-FET
performance due to strain effects.
(Paper #5.1, “Advanced Flexible CMOS Integrated Circuits on
Plastic Enabled by Controlled Spalling Technology,” D. Shahrjerdi
et al, IBM)
The extremely thin silicon-on-insulator devices had a body thickness of just 60 angstroms and were then transferred them to flexible plastic tape, where only slight performance degradation was reported.
Researchers from Everspin Technologies will describe how they built
a 64-Mb ST (spin-torque)-MRAM device with good electrical
characteristics. Conventional charge-based memory is approaching
fundamental scaling limits. Among various emerging memory
technologies, Magnetoresistive Random Access Memories have
demonstrated the capability to be successors to DRAMs or SRAMs. In
MRAMs, data is stored via magnetic moments as a “0” or “1” state.
Earlier generations of MRAMs the states were switched by
current-induced magnetic field -- an obstacle for scaling. The
ST-MRAM is switched by injecting spin-polarized tunneling current,
removing the scaling limitation. Everspin’s device is the largest
functional ST-MRAM circuit ever built, according to the company. The
green area in the “shmoo plot,” -- a graphical display of the
ST-MRAM’s performance over a range of voltages -- shows no failures
of the memory as voltages increased, indicating a robust design.
(Paper #29.3, “High-Density ST-MRAM Technology,” J. Slaughter et
al, Everspin Technologies)
Researchers from Everspin Technologies will describe how they built the largest functional spin-torque MRAM circuit ever built, a 64-Mb device with good electrical characteristics.