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Zeev00

12/13/2012 12:59 AM EST

I am somewhat uncomfortable pointing this out, but the ...

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iniewski

12/12/2012 10:50 AM EST

thank you Don and doc Divakar...any more news from IEDM anyone?

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IEDM goes deep on 3-D circuits

Don Scansen

12/10/2012 12:30 PM EST

Focus on entrepreneurs

The development of replacements for conventional silicon channel material seems to have sparked a lot of work in this area. One paper offers some results in terms of transistor performance achieved with Ge channels and ZrO2 gate dielectric while another describes microwave anneal techniques for Ge CMOS.

Another session combines imagers and integrated sensor topics. If you have any interest in imager technology, be it current or historical, then I recommend a presentation from Panasonic, “Evolution of Optical Structure in Image Sensors.”

As TSV technology appears poised for a commercial breakout, one paper from Tohoku University in the Device Characterization and Reliability session should be noted: “Minimizing the Deleterious Effect of Local Deformation Caused by Cu-TSVs and CuSn/InAu-Microbumps in High- Density 3D-LSIs.”

In addition to the increased focus on interfaces with newer device topologies and new channel materials, we also see renewed interest in noise characterization of both types of new devices. Check out this paper for more: “Insights in Low Frequency Noise of Advanced and High-Mobility Channel Transistors.”

Finally, Marvell co-founder Weili Dai is speaking at IEDM’s inaugural “Entrepreneurs Lunch” on Wednesday (Dec. 12).

Related stories:

Intel to detail tri-gate advances at IEDM

IEDM targets next-gen memory technologies






iniewski

12/10/2012 1:56 PM EST

Interesting summary Don...looking forward for more details from IEDM this week...Kris

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Don Scansen

12/10/2012 11:36 PM EST

Thanks Kris. I will see what else I can dig up.

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docdivakar

12/11/2012 2:46 PM EST

The paper on reliability discussing the "Effect of Local Deformation Caused by Cu-TSVs..." has important implications to the placement of TSV's and the keep-out rules. This is something that is still developing and has many process-dependent influences (via middle or via last etc.) as well as type of stacking (die to die vs. wafer to wafer) and the die thickness.

Regrettably I could not attend IEDM this year but would be great to see more review articles as Kris also comments above.

MP Divakar

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iniewski

12/12/2012 10:50 AM EST

thank you Don and doc Divakar...any more news from IEDM anyone?

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Zeev00

12/13/2012 12:59 AM EST

I am somewhat uncomfortable pointing this out, but the Stanford/Monolithic3D/Rambus IEDM paper (14.2) about heat extraction has absolutely nothing to do with TSVs. It talks about heat removal using inter-layer-vias of the Power Delivery Networks in monolithic 3D devices that have no TSVs. Just sayin'

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