Stanford University professor Krishna Saraswat argued for germanium and III-V materials, citing a number of IEDM papers and other conferences showing advances. “Germanium is very beneficial because in the future we will need optical interconnects at least off chip and germanium makes very good sense for both transistors and optical interconnects."
Saraswat noted fabs cannot readily support the separate needs for silicon, germanium and III-V materials. “You will have to appoint a psychiatrist for each manufacturing engineer because they will be tearing their hair out over passivation."
Aaron Thean, a director of advanced devices at the IMEC research center in Belgium, argued for a more distant future that embraces tunnel FETs working in devices at near threshold voltage levels. However he was quick to admit they “are very painful devices to make work right.”
“The device community still needs to better understand the physics of these devices,” he said.
Hu of UC-Berkeley took a roughly similar position, calling for use of pillar tunneling transistors and designs that operate on fractions of a volt as a path to “true 3-D” chips. Tunneling transistors are “a building block that’s far away but we should be thinking about it,” he said.
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