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resistion
@supersonic76, I was checking up on this. Indeed, I would think even 32 nm hp is ...
de_la_rosa
I wish eetimes would report facts rather than buy into the politics
Qualcomm joins chip manufacturing R&D program
Peter Clarke
1/28/2013 10:53 AM EST
LONDON – Qualcomm Technology Inc. has joined the core CMOS R&D collaborative research program of nanoelectronics research institute IMEC (Leuven, Belgium), the institute said Monday (Jan. 28).
In joining the collaborative research program of IMEC, Qualcomm Technology, a wholly-owned subsidiary of Qualcomm Inc. (San Diego, Calif.), joins leading chip companies including Fujitsu, Globalfoundries, Intel, Micron, Panasonic, Samsung, Taiwan Semiconductor Manufacturing Co., SK Hynix, Toshiba/Sandisk and Sony.
Even though Qualcomm is fabless, it is looking to learn about the advanced CMOS processes below 22-nm and to accelerate scaling for next-generation logic and memory products.
In May 2011, IMEC announced that another fabless company, Nvidia Corp. had joined IMEC's core CMOS program on advanced CMOS scaling as an Insite member.
"We continue to invest heavily into technology leadership which includes advanced semiconductor technologies," said Jim Thompson, executive vice president of engineering at Qualcomm Technologies Inc., in a statement issued by IMEC. "We have collaborated with IMEC on the 3-D stacking program for the last four years and we look forward to expanding our engagement with IMEC to include CMOS research and the new MRAM program."
Related links and articles:
www.imec.be
News articles:
- London Calling: Could gate-switched FDSOI win?
- IBM, Intel face off at 22 nm
- Partners back nanotube memory for production push
- Europe plots three pilot wafer fabs
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DrQuine
1/28/2013 6:47 PM EST
Sounds like good news for the nanoelectronics research institute IMEC. What I'm curious about is how all these companies will be collaborating. Is the institute serving as facility where research can be done (like a machine shop renting out space for development) or are the participating companies jointly funding research. Sounds like an intellectual property challenge - especially with all the cross licensed patents already in play.
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eewiz
1/28/2013 11:11 PM EST
I believe its mostly like jointly funding the research. IMEC will be hiring personnel and doing the research .. IP shared among investors..
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resistion
1/28/2013 11:26 PM EST
A research institute is essentially a technology development insurance company. Companies of course want exclusive licenses, which does make IP generation at a research institute a complication.
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FraAmelia
1/29/2013 4:28 AM EST
So resistor what is your opinion about this decision by Qualcomm? If IP generation at a research institute is a complication, what does Qualcomm expect from this collaboration? is it only a sort of elite club or you think that something good will come out from this joint research? I am based in EU so I am welcoming any initiative that will help Europe not to be relegated at the periphery in the semi world
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resistion
1/29/2013 5:41 PM EST
As outside observer, they're paying for advance information on processes below 22 nm. But individual companies make their own decisions.
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peter.clarke
1/29/2013 4:33 AM EST
It certainly was the case that most of the companies that are mentioned have researchers on secondment to Leuven, Belgium. This gives them the opportunity to run wafers on EUV machines...test structures and so on.
A lot of effort goes into defining the scope of the intellectual property so that the companies know which bits are communal IP which all the participants get to share.
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de_la_rosa
1/30/2013 10:22 AM EST
Do u mean test structures at 22nm or below? Because this is where i get confused. Has anybody seen decent results from an EUV platform? I saw once a 32nm half pitch pattern about 6 months ago.
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peter.clarke
1/30/2013 1:39 PM EST
I believe they run test structures.
There is some data that is private and some that is communal.
I suspect some wafers are communal and some private and confidential.
Things like lithography metrics benefit from totalling everybodies' wafers.
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de_la_rosa
1/31/2013 7:56 AM EST
Perhaps true for resist and process R&D. Difficult to see the benefits for chip manufactures though since there is no evidence asml's EUV platform can print below 32nm. Correct me if i am wrong.
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de_la_rosa
1/31/2013 11:30 AM EST
I wish eetimes would report facts rather than buy into the politics
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resistion
2/1/2013 10:18 PM EST
@supersonic76, I was checking up on this. Indeed, I would think even 32 nm hp is not yet nailed down, given the serious LER (well exceeding 10%). That's why there has even been talk of EUV being used in double patterning context, like complementary lithography proposed by Intel. Of course, consideration of double patterning defeats purpose of considering EUV.
http://www.euvlitho.com/2012/P36.pdf
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resistion
1/29/2013 5:48 PM EST
Patent search will show how rare shared IP really is. Practically nonexistent. Shared IP is an oxymoron.
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eewiz
1/29/2013 11:09 PM EST
Shared IP, as is in a license to use the IP and know how. Obviously patent assignee, which you can find from a patent search, is usually a single entity
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resistion
1/30/2013 4:40 AM EST
Certainly the technology would be available to all the member companies. But considering that the member companies use IP to compete with one another, this shared technology cannot be called IP.
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resistion
1/29/2013 7:40 PM EST
For technologies which are equally extremely high risk to all companies (like EUV), it makes sense to have the collaboration model, with actual data and information being shared. For technologies of unequally high risk (like FinFETs) the value may be realized only for some companies, e.g., Qualcomm instead of Intel in the case of FinFETs.
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