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Product Brief
Audio processor improves voice clarity in portable communication devices
Rich Pell3/31/2008 8:00 AM EDT
Using a 24-bit open-programmable DSP core and a highly configurable accelerator signal processing engine, the device is claimed to deliver the flexibility of a generic DSP with the power consumption and size of a fixed function ASIC. A patented dual-core architecture enables multiple advanced audio algorithms, such as echo cancellation and noise reduction, to run simultaneously while maintaining ultra-low power consumption.
"Moving to a 24-bit datapath architecture combined with an overall reduction in power consumption will allow our customers to perform more signal processing," said David Coode manager of ON Semiconductor's audio solutions team. "While portable electronics form-factors continue to shrink, sound quality will continue to improve."
The device features four analog inputs and a Class-D output channel. Specifications include an 88-dB system dynamic range and a 50-µA stand-by current consumption. According to the company, the BelaSigna 300 can be designed into new or existing designs with little or no impact on the overall form-factor of the communication device.
An advanced, full-duplex echo-cancelling algorithm, specifically designed for the new BelaSigna 300 architecture, is also being released. The algorithm is applicable to headset and hands-free kit manufacturers.
The BelaSigna 300 is available in an RoHS-compliant 3.63 x 2.68-mm WLCSP. Samples are available now, with production scheduled for the second quarter. Beta evaluation and development kits are currently available, with final release scheduled for July.
ON Semiconductor, 602-244-6600, www.onsemi.com
Related links:
BelaSigna 300 information page
BelaSigna 300 feature sheet (PDF)
Echo cancellation algorithm flyer (PDF)
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