Product Brief
Ultralow-jitter clock synthesizer ICs leverage innovative topology
Bill Schweber8/4/2008 12:01 AM EDT
The QuietClock ICs use what Multigig calls RotaryWave™, a rotary travelling-wave oscillator approach, based on a differential transmission line which uses its length and tap points to provide the VCO, the key to a stable, low jitter, low phase-noise clock.

Quietclock synthesizer IC block diagram
(Click on image to enlarge)
Amplifiers along the line are used to realize a distributed-amplifier circuit, and the transmission line is connected in a loop with a half-twist, similar to a Mobius strip; the oscillator frequency is set by the time it takes for a signal to travel twice around the loop. Internal inherent noise starts the oscillation process, while the amplifiers add coherent energy to the ring. Multiple phases are available via taps along the loop. The company claims that the design greatly reduces typical CV2F loss, so overall power consumption is lower than available products, as well.
Typical phase jitter is 60 fs, with 20/80% output rise/fall time of 150 ps minimum and 350 ps maximum. For a 125 MHz operation, measured phase noise is -103 dBc/Hz at 100 Hz offset from the carrier, dropping to -167 dBc/Hz at 20 MHz offset.

Phase noise plot, 125 MHz
(Click on image to enlarge)
The 25 parts announced (for 2.5 and 3.3 V operation) support applications such as gigabit Ethernet (GBE), serial Rapid I/O, SONBET/SDH, Fibre Channel, Inifiniband, and SATA, in a variety of packages which are pin-compatible with industry-standard synthesizer ICs; clock outputs encompass LVPECL, LVCMOS, and LVDS compatibility.—Bill Schweber
Pricing and availability: Samples are available now. Prices begin at $2.75 each in 1000-piece orders.
For more information: Multigig, Inc., www.multigig.com.



