Product Review

The eyes reveal all: ultra-fast logic analyzer tackles DDR, other high-speed, multichannel challenges

Bill Schweber
3/28/2011 9:23 AM EDT

If there's one thing more difficult than developing circuitry for leading-edge performance, it's debugging and validating it. The Agilent Technologies U4154A logic analyzer module for AXIe-based systems eases the pain, with what the vendor says is industry's fastest specifications: capture of 4 gigabits/sec (GB/s) on 68 channels, and 2.5 Gb/s on 136 channels, along with the ability to capture data on eye openings as short  as 100 ps in width and small as 100 mV in height (the eye gives insight into the soul of the new design, right?).

It is targeted at applications such as double data rte (DDR) memory systems (DDR3 2133 and beyond), plus high-speed ASICs, A/D converters, and FPGAs operating in the Gb/sec region. The unit works across all four stages of the connect, acquire, and view/analyze process, by providing probing, data acquisition, analysis tools, and signal integrity assessment:

  • Probing consists of interposers, BGA probes, and mid-bus probing "SoftTouch"
  • Data acquisition includes the ultra-high-speed logic analysis module
  • Analysis tools include the decoder, protocol analysis, and performance analysis
  • And signal integrity allows for waveform observation and inspection

Sampling resolution of the 100 ps/100 mV data valid window is 5 ps/5mV, and the fully colorized false-color display (user choice) eases observing all the complex signals and waveforms. Memory depth is up to 200 Msamples/channel.

Of course, an analyzer without good triggering is not useful, so the trigger sports a 2.5 GHz sequence rate, with up to eight sequencer levels, and several burst recognizers (bursts of 8×4, 4×8, and 2×16). Burst scans allow you to view each sample in a DDR burst, and view all signals relative to each other. A hardware accelerator means that scans which took hours can now be done in minutes.

For DDR and LPDDR, the analyzer includes protocol violation check, which looks for three types of protocol violations and 12 types of protocol timing violations; performance analysis, which provides bus statistic information and a histogram view of the number of access at a specified memory address; and trigger setup, for automation of the physical address trigger setup. Timing zoom offers simultaneous sate measurements along with ting measurements, with 80 ps resolution and 256 ksample depth, for insight over a 20-μsec span.

Pricing and availability: the Agilent U4154A begins shipping in April. A 136-channel unit, with chassis and probe cables (but not probes) starts at $115,500. To give an example configuration: a DDR3 interposer solution—consisting of two U4154A modules, eight U4201A cables, one M9502A chassis, a DDR3 DIMM interposer, and decoder and compliance software, along with 2M of memory depth—is $275,000; while the same configuration with 200M memory depth is $560,000. Some specialty probes are offered through Agilent partners, such as FuturePlus and Nexus Technology

For more information, go to http://www.aglient.com/find/U4154A .





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