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Product Review
Aldec releases Xilinx-FPGA-based HES-7 ASIC prototyping board
Clive Maxfield10/17/2012 12:06 PM EDT
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I just heard from the guys and gals at Aldec that they've released the HES-7 -- their latest FPGA-based prototyping board leveraging the All Programmable Xilinx Virtex-7 FPGA.
By utilizing a high-density single or dual FPGA configuration, the HES-7 platform eliminates many prototyping issues regarding complicated FPGA partitioning strategies such as high power consumption and restricted I/O.
The HES-7 provides an affordable, flexible, and scalable prototyping platform allowing designers to verify their designs (up to 24 Million ASIC gates) more quickly with pre-existing FPGA synthesis tools.
Click Here for more information, about the HES-7 prototype system. Here you’ll find links to the resources below.
Node that registration is required for some of these resources, but the folks at Aldec say that registration is simple and provides access to all Aldec product downloads, technical documentation, webinars, and their support portal.
Registration Required (Download)
No Registration Required (View/Download)
Availability
All configurations are shipping today and include a standard 12 month limited warranty.
Pricing
Contact Aldec for available configurations and pricing.
Technical Questions
The folks from Aldec say that they have an application engineer standing by – all you have to do is register on their site and send all questions via the Aldec support portal (www.aldec.com/support).
If you found this article to be of interest, visit Programmable Logic Designline where – in addition to my Max's Cool Beans blogs – you will find the latest and greatest design, technology, product, and news articles with regard to programmable logic devices of every flavor and size (FPGAs, CPLDs, CSSPs, PSoCs...).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for my weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
By utilizing a high-density single or dual FPGA configuration, the HES-7 platform eliminates many prototyping issues regarding complicated FPGA partitioning strategies such as high power consumption and restricted I/O.
The HES-7 provides an affordable, flexible, and scalable prototyping platform allowing designers to verify their designs (up to 24 Million ASIC gates) more quickly with pre-existing FPGA synthesis tools.
Click Here for more information, about the HES-7 prototype system. Here you’ll find links to the resources below.
Node that registration is required for some of these resources, but the folks at Aldec say that registration is simple and provides access to all Aldec product downloads, technical documentation, webinars, and their support portal.
Registration Required (Download)
- Joint Authored White Paper from Aldec and Xilinx
- Technical Specification on the Board
No Registration Required (View/Download)
- Datasheet
- FAQ’s
Availability
All configurations are shipping today and include a standard 12 month limited warranty.
Pricing
Contact Aldec for available configurations and pricing.
Technical Questions
The folks from Aldec say that they have an application engineer standing by – all you have to do is register on their site and send all questions via the Aldec support portal (www.aldec.com/support).
If you found this article to be of interest, visit Programmable Logic Designline where – in addition to my Max's Cool Beans blogs – you will find the latest and greatest design, technology, product, and news articles with regard to programmable logic devices of every flavor and size (FPGAs, CPLDs, CSSPs, PSoCs...).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for my weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
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