Product Review

SoftJin’s Universal TV Encoder IP for FPGA and SoC-based systems

Clive Maxfield
1/4/2011 11:31 AM EST

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Anil Parchuri

1/6/2011 7:47 AM EST

Here are gate count details. The Resource Count of this IP on Xilinx Spartan 6 ...

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Max the Magnificent

1/5/2011 9:11 AM EST

I'll ping them and ask them to comment -- Max

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SoftJin (www.SoftJin.com) is a technology company and a provider of IP solutions for various application domains, including Audio/Video Processing, Error Correction, Communication, Memory Controllers, and other interfaces. The folks at SoftJin have just announced a Universal TV Encoder IP, which accepts a BT 601/656 or BT 709/1120 stream as input and generates high quality SD/ HD video data accepted by a wide range of SD and HD Display devices.

This cost-effective IP supports the generation of SD output which can be given to any display unit which support CVBS, S-Video or Component video standards. The HD output can be in the form of YPbPr standard data for Analog HD TVs as well as HDMI standard data for digital HD TVs. This makes the Universal TV Encoder IP an ideal building block for SoC or FPGA-based systems targeting set-top-boxes, Media players, TVs, and digital camera processors.

“Since there are wide range of Televisions and display devices in the market today, SoCs or Systems interfacing with these displays need a Universal TV Encoder Block that can be used to support as many types of these displays as possible. With capability to encode both SD and HD data, SoftJin’s Universal TV Encoder IP can be elegantly used along with any SD or HD TV. In addition, SoftJin’s Universal TV Encoder IP is designed to handle the various SD formats like PAL, NTSC and SECAM through which the usability of the device can be extended to all the regions,” says Shridhar Laddha, Director at SoftJin Technologies.

SoftJin’s Universal TV Encoder IP has been proven on Altera and Xilinx FPGAs. It has been extensively tested across various video data formats along with wide range of SD/HD displays. The key features of the IP include:

  • Supports BT601, BT656 and BT 709/1120 input formats
  • Supports NTSC, PAL, SECAM output standard definition video standards
  • Supports input in both interlaced and non-interlaced formats
  • Supports High Definition Analog and Digital output video formats (YPbPr standard data for Analog HD TV and HDMI standard data for digital HD TVs)
  • Supports Composite, S-video, Component video output standards
  • De-interlacing and up-scaling of SD to HD
  • Supports internal Color Bar mode
  • SD output generation at 480i/576i video modes
  • HD output generation at 480p/576p/720p/1080i/1080p video modes

The key hardware components that are present in Universal TV Encoder include:

  • Motion adaptive interlacer
  • SD to HD upscaler
  • NTSC/PAL/SECAM Encoder
  • HD Encoder
  • HDMI Tx

SoftJin’s Universal Encoder IP can be licensed in Source code (Verilog RTL) as well as Netlist format under single-use or multiple-use pricing models. Deliverables also include detailed documentation and a test environment.

Click Here for more details about SoftJin’s Universal TV Encoder IP or contact them at sales@softjin.com




Max the Magnificent

1/4/2011 11:43 AM EST

I'm always impressed with the things the guys and gals at SoftJin come up with -- the problem is that you never know what they are going to come up with next (grin)

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Dr DSP

1/4/2011 10:42 PM EST

I can't find any estimates for gate count. Is external memory needed? External DAC? Would be nice to see this in the posting..

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Max the Magnificent

1/5/2011 9:11 AM EST

I'll ping them and ask them to comment -- Max

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Anil Parchuri

1/6/2011 7:47 AM EST

Here are gate count details. The Resource Count of this IP on Xilinx Spartan 6 family are ~ 30K LUT's and 20k Registers and 120 DSP Blocks.
Yes, 16MBytes DDR2/DDR3 external memory is required. Spartan 6 MCB interface is used for external memory access.
External DAC's are also required.

Please see http://www.softjin.com/IP_Datasheet_PDF_version/Universal_TV_Encoder_Datasheet.pdf for more details about the data sheet of the IP.

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