DCD's D68000 IP core with Linux, MAC, and debugger

The folks at Digital Core Design in Poland have introduced the newest version of the classic Motorola 68000 16/32-bit microprocessor. The D68000 is the industry’s low cost 32-bit MCU, offering a low cost entry point combined with effective performance. The improved architecture of the D68000 enables this IP Core to run with uCLinux, so it can be  easily used as an HTTP server or an FTP client.

The D68000 is 100% compatible with original Motorola’s 68000. As a proof, a test run on a classic Amiga 500+ computer clearly showed that DCD’s CPU can be used as a 1:1 replacement for the original chip.

Having said this, classic computers are not the target destination for this product, because the improved architecture of the D68000 creates new possibilities. The D68000 runs with the uCLinux Operating System, which makes this IP Core an interesting solution for embedded servers that are certified to be used only with m68k processors.

The BOA application is used as an HTTP server, and effective communication can be established via the FTP protocol. uCLinux is a MMU‐less derivative of the Linux Operating System adopted for embedded solutions. It provides all of the Linux benefits, including superior stability, a common Linux Kernel API, multitasking, full featured TCP/IP networking, an Virtual File System. Also, it reduces the amount of memory needed by the kernel and when running applications (it utilizes just 400kB).

To make the implementation process even easier, DCD’s solution is delivered with a fully automated test-bench and a complete set of tests, which allow easy package validation at each stage of the FPGA / ASIC / SoC design flow.

"We have built special testing platform to run D68000 with uCLinux Operating System," explains Jacek Hanke, President of Digital Core Design, "and to make this IP Core more user friendly, it’s be-ing equipped with the DoCD-BDM hardware debugger."

This new IP Core from DCD is a technology-independent solution, which enables any engineer to im-plement it as an ASIC/SoC or using FPGAs from Altera, Lattice, or Xilinx.

The D68000 is binary-compatible with m68k family of microprocessors. Moreover, DCD’s D68000 has a 16-bit data bus and a 24-bit address data bus. The D68000's code is compatible with the MC68008, upward code compatible with the MC68010 virtual extensions and with the MC68020's 32-bit implementation of the architecture. The difference lies in an improved instructions set, which allows the D68000 to execute a program with higher performance than the standard 68000 core can offer.

MULS and MULU instructions take just 28 clock periods, as do their DIVS and DIVU counterparts. Optimized shifts and rotations, combined with shorter effective address calculation time and re-moved idle cycles, make the D68000 much more power efficient that the original Motorola architec-ture.

To complement the D68000 offer, it’s being developed with DoCD-BDM hardware debugger, which provides debugging capability not only for the IP Core, but for the whole SoC system.

DCD’s debugger is 100% compatible with BDM debug interfaces, working smoothly with its interfac-es/cables: Public Domain cable, Macraigor Wiggler and P&E BDM cable. DoCD is also fully supported by standard debugging tools like GNU GD8 debugger, Cosmic ZAP debugger and Tasking debugger.

Click Here for more information about the D68000 and Click Here for more information about the D68000 and uCLinux.

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