datasheets.com EBN.com EDN.com EETimes.com Embedded.com PlanetAnalog.com TechOnline.com  
Events
UBM Tech
UBM Tech

Product Review

Accellera announces SystemC AMS 2.0 Standard

Clive Maxfield
3/20/2013 4:47 AM EDT

Tell us What You Think

We want to know what you thought about this Product. Let us know by adding a comment.

ADD A COMMENT >

Accellera Systems Initiative, an independent non-profit organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards for design and verification, has announced the completion of the SystemC Analog /Mixed-Signal
(AMS) 2.0 extensions. SystemC AMS 2.0 is an industry-driven mixed-signal standard for electronic system-level design. The SystemC AMS 2.0 language reference manual (LRM) is available for download under SystemC open-source license at www.accellera.org.

The AMS 2.0 standard is fully compatible with the latest release of the SystemC standard, IEEE Std. 1666-2011. The update of the AMS extensions contains additional features to model dynamic and reactive mixed-signal behavior at high levels of abstraction. New semantics and language constructs complement the standard to address modeling accuracy, fidelity and speed for efficient mixed-signal system-level design. The release incorporates updates from the public review conducted in 2012.

 “With completion of the SystemC AMS 2.0 standard, Accellera Systems Initiative shows its ambition to shape unique standards for mixed-signal applications,” said Shishpal Rawat, chair of Accellera Systems Initiative. “We appreciate the outstanding efforts of the European semiconductor companies, research institutes and academic partners involved in the SystemC AMS working group to create this industry-driven standard.”

A main feature of the updated SystemC AMS 2.0 standard is the introduction of dynamic features for the Timed Data Flow (TDF) model of computation, the abstract modeling style introduced in SystemC AMS 1.0. Concepts such as variable and event-triggered time steps, data rates and delays that enable more efficient and even faster simulation performance make SystemC AMS an excellent language for the creation of SystemC-centric mixed-signal virtual prototypes.

“With SystemC AMS 2.0 we have defined a compelling system-level mixed-signal modeling standard essential to the design of heterogeneous embedded systems where analog, digital and software functionality comes together,” said Martin Barnasconi, chair of the SystemC AMS Working Group. “As evidenced by the growing industry support, I’m confident that SystemC AMS will emerge soon in advanced system-level design tools and flows to tackle the development challenges of complex mixed-signal ICs and systems.”

SystemC AMS working group members will continue to work on the user’s guide and to document all new capabilities of the SystemC AMS language, including examples and detailed explanations of the modeling features. Periodic updates in workshops and tutorials at various conferences will be made over the year, including the 2013 Design Automation and Test in Europe (DATE) conference. Presentations at DATE include the European SystemC Users Group (ESCUG) Meeting to be held on March 19 and a workshop on March 22 entitled “ESL - Putting the Pieces Together: Integrating SystemC Design and Verification with AMS and Algorithm Design.”

About Accellera Systems Initiative
Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development, and as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. For membership information, please email membership@accellera.org.
 

If you found this article to be of interest, visit Programmable Logic Designline where – in addition to my Max's Cool Beans blogs – you will find the latest and greatest design, technology, product, and news articles with regard to programmable logic devices of every flavor and size (FPGAs, CPLDs, CSSPs, PSoCs...).

Also, you can obtain a highlights update delivered directly to your inbox by signing up for my weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).




Please sign in to post comment

Navigate to related information

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
Browse the technical library
Our technical library houses over 4,000 high-quality sponsored white papers, application notes, reference guides, use cases—all organized by company.