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Product Review

TI claims industry’s lowest phase noise frequency synthesizer

Steve Taranovich
1/21/2013 9:52 PM EST

Synthesizer with integrated VCO outputs 50 to 3760 MHz, supports wide range of applications

Texas Instruments introduced a wideband frequency synthesizer with integrated voltage-controlled oscillator (VCO) that delivers, what TI claims is the industry’s lowest phase noise. Its combination of ultra-low noise phase-locked loop (PLL) and industry’s highest phase detector frequency performs well in both phase noise and spurs. The LMX2581 combines the capability to drive high system performance along with the flexibility of a wideband frequency synthesizer that outputs 50 to 3760 MHz.

It allows designers to use one frequency synthesizer to support a variety of demanding applications in wireless infrastructure, radar, medical imaging, defense and aerospace, and test and measurement.


In addition, the IC improves total link power efficiency and communication channel capacity when combined with the following high-speed analog signal chain devices from TI: LMK04828 or LMK04800 clock jitter cleaner; AD42JB69 dual-channel, 16-bit, 250-MSPS analog-to-digital converter (ADC) with JESD204B serial interface or ADC16DV160 dual-channel, 16-bit, 160-MSPS ADC; DAC34SH84 quad-channel, 16-bit, 1.5-GSPS digital-to-analog converter (DAC), and the TRF3705 300-MHz to 4-GHz quadrature modulator. 

Block diagram for LMX2581

 Key features and benefits

  • Industry’s best phase noise improves RF sensitivity: Phase detector frequency of 200 MHz and ultra-low PLL normalized phase noise of -229 dBc/Hz provides a precision local oscillator to an RF front end for better receiver sensitivity.

 

One of the Phase Noise plot capabilities of the LMX2581EVM evaluation board

  • Multi-core VCO provides maximum flexibility: Integrated VCOs allow the device to output frequencies from 50 MHz to 3760 MHz, eliminating the multiple VCO/PLL combinations typically required to support a broad range of applications. The LMX2581 also gives designers the option to bypass its internal multi-core VCO in favor of an external VCO.
  • Low fractional spurs for high RF spectral purity: Delta-sigma PLLatinum™ PLL engine with 200-MHz phase detector frequency boosts spurious performance.
  • Integration reduces bill of materials (BOM) costs: Ultra-low noise, wideband frequency synthesizer integrates a delta-sigma fractional-N PLL; a multi-core VCO with tank circuit; optional frequency divider; two differential RF output buffers that can deliver 10 dBm single-ended on each side; and several low-noise, high precision low dropout regulators (LDOs). 

Tools and support


LMX2581EVM evaluation board GUI

The LMX2581EVAL evaluation module can be purchased today for US$175. The synthesizer’s companion Clock Design Tool and CodeLoader software help speed system design by aiding engineers with product selection, loop filter design and simulation of timing solutions. Both of these tools and other clock design software are available in the WEBENCH® Design Center.

Availability, packaging and pricing

The LMX2581 is available today in a 32-pin, 5-mm x 5-mm QFN package for a suggested retail price of US$7.00 in 1,000-unit quantities.

For more information visit TI’s website.

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.





pcsalex

1/22/2013 9:16 PM EST

in 1994 I designed and built 5.9 GHz PLLs with 102dBc SSB noise at 1kHz from the carrier using discrete components and G10 pcb material

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scs2016

1/29/2013 8:52 AM EST

That's an impressive synthesizer. Did you use a PLL IC, or was that made from discrete parts too?

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Redtop

1/23/2013 6:54 AM EST

Is there any Phase Noise data available for this part at higher Carrier Frequencies e.g. 4.4MHz ?

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vmui

1/23/2013 7:37 PM EST

Thanks for your interest in our product, @Redtop. I’m the product marketing manager for the LMX2581.

1. Could you please clarify what the higher carrier frequency you are interested in?
2. What is the 4.4 MHz? Is it an offset frequency of the carrier frequency?

By the way, please go to http://www.ti.com/e2ect-pr for the Clocks & Timers E2E Community page while you have further synthesizer and clocking related questions. There are so many talented engineers to discuss the timing technical questions.

See you there.

Regards,
Vincent Mui

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WKetel

1/23/2013 8:52 PM EST

Reference dithering does not get rid of any spurs. What it does do is make them much harder to see with a spectrum analyzer. But the spurs are still apparent as increased noise floor when the synthesizer is used as a receiver local oscillator.
Is this synthesizer also available in a model that would cover the band between 17 and 18 MHz? And what about the reference signal requirements? It looks interesting.

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vmui

1/25/2013 3:15 AM EST

Thanks for your interest in our product, @WKetel. I’m the TI product marketing manager for the LMX2581.

1. Dithering is a technique of adding randomness to the sequence, and it is able to get rid of some sub-fractional spurs, but it cannot solve all the spurs issues. The dithering is usually programmable, depending on the different conditions. For further details, please download Dean Banerjee’s PLL text book: http://www.ti.com/tool/pll_book .

2. The minimum operation frequency of the LMX2581 is 50 MHz, and you can use the dividers (/4) at the output to get the lower frequency.

3. The reference input can accept up to 900 MHz when the doubler is disabled. The range of the input voltage is from 0.4 to 1.7 Vpp.

If you have any further questions, please go to http://www.ti.com/e2ect-pr for the Clocks & Timers E2E Community page.

Thanks,
Vincent Mui

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Zarathustra@

1/30/2013 8:04 AM EST

Dithering is a sub catagory to Stochastic Resonance. It's effectivitity is based on a non-gaussian resonance. If the spur is harmonic (do to non-linearities), it is most effective. If Athanasios Papoulis didn't hurt you enough see;

http://iopscience.iop.org/1742-5468/2009/01/P01003/pdf/1742-5468_2009_01_P01003.pdf

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