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Product Review

Webench tool tackles challenging FPGA power-rail specs, offers up various plays and tactics

Bill Schweber
9/13/2010 12:02 AM EDT

Santa Clara, CA—FPGAs are wonderful and deservedly popular devices, but they have complex, confusing, and sometimes seemingly contradictory power-rail requirements, all called out in dozens of pages of their application and support documentation. To make the designer's challenge even more difficult, you are charged with powering the FPGA while minimizing cost, maximizing efficiency, or optimizing other parameters—and sometimes trying to do more than one of these at the same time (good luck on that!). Trying to balance the nominal rail values, plus their various tolerance, current, ripple, noise filtering, synchronization, and start-up modes (ramp rate/soft start) can be frustrating at best, nerve-wracking at worst, and there's always that pesky someone who asks, "that's nice, but did you consider option XYZ?" at the design review.

To lend a major assist, National Semiconductor Corp. has expanded its Webench family with the addition of Webench FPGA Power Architect, a design tool which models and optimizes FPGA power supply choices. Key to the tool's effectiveness is that it includes, by make and specific model, over 130 FPGAs from Altera Corp and Xilinx, Inc. You tell it the FPGA you'll be using, it responds with the core and I/O power requirements and a suitable supply architecture.

You can add additional loads, and then use the tool's dials to "tune" the architecture, in real time, to assess and tradeoff key performance attributes in efficiency, footprint, performance, and of, course, cost, to see what you can get or give up as you move within the overall allowed envelope. In other words, you can move along the various axes within the multidimensional performance bubble to find a "sweet spot" that best meets your prioritized objectives.


(Click on image to enlarge)
Once you are done, Webench FPGA Power Architect provides a complete schematic, detailed bill of materials (BOM) along with required passive components (can't forget those!), costing, and numerous performance graphs and data. You can also share these results with other members of your team via a web link.—Bill Schweber

Price and availability: The tool is available now. Price: free, and you don’t need to register to use it, but you do have to register to carry it through to the final, comprehensive documentation package.

For more information: check out the tool at http://www.national.com/FPGAarchitect, or watch a video demonstration at http://bit.ly/videoFPGA.

 





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