New triple-rate SDI reference designs from Xilinx

Triple-rate SDI designs with Virtex-5 FPGAs provide a single-chip, low-power interface that supports standard definition (SD), high definition (HD), and emerging 3G SDI standards for broadcast video applications.

Virtex-5 FPGAs implement triple-rate SDI on a single, low-power multi-gigabit transceiver (MGT) capable of supporting full-bandwidth 1080p60 video. This unique configuration enables dynamic switching between SD, HD and 3G-SDI standards for transmit or receive, with automatic standard detection and without reprogramming the FPGA. It is also possible to support all received data rates with a single reference clock.

These triple-rate SDI designs are the latest addition to the comprehensive portfolio of solutions already available from Xilinx for broadcast video connectivity applications. These include non-trivial conversion between Dual Link HD-SDI and 3G-SDI and between levels A and B of the 3G-SDI standard, as well as pass-through designs for all the SDI data rates. In addition, Xilinx also provides a number of complementary designs supporting HD-SDI audio embedding/de-embedding and audio sample rate conversion.