The folks at Altera
say that their Stratix III FPGAs support Serial Gigabit
Media Independent Interface
(SGMII) on their LVDS I/Os.
Offering interface speeds of 1.25 Gbps and meeting SGMII's stringent jitter performance requirements, Stratix III LVDS I/Os support triple-speed Ethernet (10/100/1000 Mbps) interfaces without transceivers. Stratix III FPGAs are therefore claimed to be the industry's first programmable logic devices able to support Gigabit Ethernet SGMII on LVDS pins, offering lower costs, lower power, and more interfaces per device.
The SGMII I/Os featured in Stratix III FPGAs allow the device to connect to Gigabit Ethernet ports through small form-factor pluggable (SFP) optical modules. Using Stratix III FPGA's LVDS channels, customers can integrate a large number of Gigabit Ethernet channels in high-port-count applications, such as 96-port SGMII switches.
Stratix III FPGA LVDS channels support Gigabit Ethernet SGMII as a result of the architecture's low jitter performance, dynamic phase aligner (DPA) and soft clock-data recovery (CDR) mode. Soft-CDR, which is implemented in the programmable fabric as IP, supports SGMII by extracting the clock out of the clock-embedded data.
Altera's Stratix III FPGAs, offering Gigabit Ethernet SGMII connectivity on its LVDS I/Os, are available now.
Click Here to view a demonstration video showing how to build a 96-port SGMII Gigabit Ethernet with Stratix III FPGAs. And Click Here for additional information about Altera's high-density, high-performance Stratix III FPGAs and their support for SGMII.