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EVE unleashes DW-FPGA for FPGA synthesis
Clive Maxfield5/27/2008 6:00 AM EDT
DW-FPGA offers register transfer level (RTL) source code for the most commonly used DesignWare Foundation Library intellectual property (IP) components from Synopsys Inc. DW-FPGA supports XST from Xilinx, Quartus from Altera, Synplicity's SynplifyPro and Precision from Mentor Graphics Corporation, along with languages Verilog, VHDL and SystemVerilog. It can be used with or without EVE's ZeBu and for simulation, emulation, prototyping and FPGA designs.
When implementing an application specific integrated circuit (ASIC) design on an FPGA or an FPGA prototyping board, the original ASIC design often uses DesignWare Foundation components not readily available for an FPGA implementation. With DW-FPGA, whenever ASIC-based RTL code references a DesignWare component of the foundation library, the synthesis tool automatically uses the synthesizable definition contained in the provided source code to infer an optimized FPGA description. DW-FPGA includes typical DesignWare functions, including adders, subtracters, multipliers, dividers, cosines, and squareroot.
DW-FPGA will be demonstrated, along with EVE's entire line of hardware/software co-verification solutions, during the 45th Design Automation Conference (DAC) in booth #301 June 9-12 at the Anaheim Convention Center in Anaheim, California.
Pricing and availability
DW-FPGA is priced at $5,000 for a one-year, time-based license provided as a site license. For more information, contact Lauro Rizzatti, general manager of EVE USA and vice president of worldwide marketing. He can be reached at (408) 855-3201 or via email at lauro@eve-team.com.
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