The folks at National Semiconductor
have introduced the industry's first triple-rate (3G/HD/SD) serial digital interface
(SDI), dual-channel serializer and deserializer (SerDes) transceiver. With industry-leading jitter performance and two channels of receive and transmit on a single chip, National's LMH4345 SerDes transceiver enables engineers to reduce board space, system cost and power consumption in multi-channel broadcast video equipment. The device is well-suited for use in video routers, production switchers, video servers, format
converters, video editing and modular equipment.
The LMH4345 SerDes transceiver delivers jitter performance of 30 picoseconds (ps) output alignment jitter and 0.6 units interval (UI) minimum input jitter tolerance. The transmitter's ultra-low output jitter provides ample margin for meeting the Society of Motion Picture and Television Engineers (SMPTE) 424M jitter specifications. The receiver's high input-jitter tolerance guarantees the deserializer will successfully receive, lock and deserialize incoming video streams that have accumulated noise, even with up to 70 percent of the signal's eye closed. SMPTE 424M is the SDI industry standard for transporting uncompressed 1080p signals at up to 60 frames per second over 3 Gbps serial links.
The LMH4345 delivers the raw analog performance of a discrete SerDes in a flexible multi-channel configuration, which until now has only been offered with more expensive, high-end field-programmable gate arrays (FPGAs). Designing with National's LMH4345 eliminates the need for expensive power supplies, noise isolation circuits, pristine reference clocks and the external voltage-controlled crystal oscillators (VCXOs) that are required by high-end FPGAs with integrated SerDes. Additionally, the LMH4345 includes four integrated SDI cable drivers, two SDI output drivers and two reclocked loop-through drivers that further reduce bill of materials (BOM), board area and system cost.
The LMH4345 architecture leverages a 5-bit low-voltage differential signaling (LVDS) parallel bus to simplify FPGA interface. The transceiver's LVDS interface reduces electromagnetic interference (EMI), while the narrow parallel bus enables a single low-cost FPGA to support a greater number of high-speed video channels. The LMH4345 is commonly designed into broadcast video systems with National's SDI adaptive cable equalizer (LMH0344), multi-format sync separator (LMH1981) and video clock generator (LMH1982).
Key features of the LMH4345 3G/HD/SD dual-channel SerDes transceiver
National's LMH4345 triple-rate SDI serializer supports 270 Mbps, 1.485 Gbps and 2.97 Gbps data rates, enabling transmission of digital video broadcasting-asynchronous serial interface (DVB-ASI), standard-definition (SMPTE 259M-C), high-definition (SMPTE 292M) and the new 3G-SDI standard (SMPTE 424M). The LMH4345's two receivers include a clock and data recovery circuit (CDR) that automatically detects the incoming serial data rate, extracts the clock and deserializes the data into a 5-bit LVDS stream to simplify interfacing with a host FPGA. Additional outputs for serial reclocked loop-through provide access to the ingested signals for real-time input monitoring. Each transmitter includes an integrated, low-bandwidth phase-lock loop (PLL) that cleans the parallel clock noise added from the FPGA, alleviating the need for external clock conditioning. The LMH4345 is housed in a small 14 mm by 14 mm, 100-pin TQFP package that is less than half the size of discrete competitive solutions. Typical power consumption is 1.6W at 3 Gbps data transmission rates.
In addition to National's triple-rate LMH4345, the company also offers the LMH4045 SDI dual-channel SerDes transceiver for HD/SD operation and the LMH4075 for SD-only operation.
Pricing and availability
All three SDI SerDes transceivers are sampling now, with production quantities scheduled for first quarter 2009. The LMH4345 (triple-rate) is priced at $55, the LMH4045 (HD/SD) is $49 and the LMH4075 (SD) is $30, each in 100-unit quantities. Provided with the purchase of these products is SMPTE IP available in synthesizable Verilog or VHDL source code for popular FPGA models. This comprehensive FPGA IP allows system designers to quickly adapt to standard changes, customize features or add functionality to differentiate end products.
For more information or to order samples and an evaluation board, visit:
National will demonstrate this product at the International Broadcasting Convention (IBC) in Amsterdam from September 12-16 at Hall 11, Booth F79.