Product Brief
Mixed Radix FFT IP Core for Xilinx FPGAs
Clive Maxfield1/6/2009 11:47 AM EST
Editor's Note: My old chum Tom Dillon, president of Dillon Engineering (www.DillonEng.com) is a man of few words, but each one counts as is demonstrated in the following newsflash he just sent me:
Hi Max, Dillon Engineering is pleased to announce the availability of our Mixed Radix FFT IP Core for Xilinx FPGAs. This is a hybrid Fast Fourier Transform (FFT) processor targeted specifically to Xilinx FPGAs.
The Mixed Radix FFT IP core features:
- Any combination of radix-2, -3, -5, and -7
- IEEE 754 Floating Point or Fixed Point
- Run-time selectable length within superset
- 250 MSamples/seconds
- Natural order I/O
- C/C++ and MATLAB bit accurate models
- Netlist and full source versions available
Check out our DE FFT IP Cores to see the latest FFT IP available from Dillon Engineering. Also, check out the latest DE News to find out what else has been happening around here.
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